From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Peter Xu <zhexu@redhat.com>
Cc: kvm@vger.kernel.org, "Marcelo Tosatti" <mtosatti@redhat.com>,
"Luiz Capitulino" <lcapitulino@redhat.com>,
"Radim Krčmář" <rkrcmar@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: Re: [kvm-unit-tests PATCH] tscdeadline_latency: Check condition first before loop
Date: Thu, 11 Jul 2019 07:05:53 -0700 [thread overview]
Message-ID: <20190711140553.GB7645@linux.intel.com> (raw)
In-Reply-To: <20190711073335.GC7847@xz-x1>
On Thu, Jul 11, 2019 at 03:33:35PM +0800, Peter Xu wrote:
> On Thu, Jul 11, 2019 at 03:17:56PM +0800, Peter Xu wrote:
> > This patch fixes a tscdeadline_latency hang when specifying a very
> > small breakmax value. It's easily reproduced on my host with
> > parameters like "200000 10000 10" (set breakmax to 10 TSC clocks).
> >
> > The problem is test_tsc_deadline_timer() can be very slow because
> > we've got printf() in there. So when reach the main loop we might
> > have already triggered the IRQ handler for multiple times and we might
> > have triggered the hitmax condition which will turn IRQ off. Then
> > with no IRQ that first HLT instruction can last forever.
> >
> > Fix this by simply checking the condition first in the loop.
> >
> > Signed-off-by: Peter Xu <peterx@redhat.com>
> > ---
> > x86/tscdeadline_latency.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/x86/tscdeadline_latency.c b/x86/tscdeadline_latency.c
> > index 0617a1b..4ee5917 100644
> > --- a/x86/tscdeadline_latency.c
> > +++ b/x86/tscdeadline_latency.c
> > @@ -118,9 +118,9 @@ int main(int argc, char **argv)
> > test_tsc_deadline_timer();
> > irq_enable();
> >
> > - do {
> > + /* The condition might have triggered already, so check before HLT. */
> > + while (!hitmax && table_idx < size)
>
> Hmm... I think this is not ideal too in that variables (e.g., hitmax)
> could logically still change between the condition check and HLT below
> (though this patch already runs nicely here). Maybe we can simply use
> "nop" or "pause" instead of "hlt".
>
> I tested that using pause fixes the problem too.
Ensuring the first hlt lands in an interrupt shadow should prevent getting
into a halted state after the timer has been disabled, e.g.:
irq_disable();
test_tsc_deadline_timer();
do {
safe_halt();
} while (!hitmax && table_idx < size);
>
> > asm volatile("hlt");
> > - } while (!hitmax && table_idx < size);
> >
> > for (i = 0; i < table_idx; i++) {
> > if (hitmax && i == table_idx-1)
> > --
> > 2.21.0
> >
>
> Regards,
>
> --
> Peter Xu
next prev parent reply other threads:[~2019-07-11 14:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-11 7:17 [kvm-unit-tests PATCH] tscdeadline_latency: Check condition first before loop Peter Xu
2019-07-11 7:33 ` Peter Xu
2019-07-11 14:05 ` Sean Christopherson [this message]
2019-07-11 23:27 ` Peter Xu
2019-07-11 23:34 ` Sean Christopherson
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