From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68EFAC7618F for ; Tue, 16 Jul 2019 19:41:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 483A02145D for ; Tue, 16 Jul 2019 19:41:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388657AbfGPTlJ (ORCPT ); Tue, 16 Jul 2019 15:41:09 -0400 Received: from mga07.intel.com ([134.134.136.100]:52622 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728137AbfGPTlJ (ORCPT ); Tue, 16 Jul 2019 15:41:09 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Jul 2019 12:41:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,271,1559545200"; d="scan'208";a="187402808" Received: from sjchrist-coffee.jf.intel.com (HELO linux.intel.com) ([10.54.74.165]) by fmsmga001.fm.intel.com with ESMTP; 16 Jul 2019 12:41:07 -0700 Date: Tue, 16 Jul 2019 12:41:07 -0700 From: Sean Christopherson To: Liran Alon Cc: "Singh, Brijesh" , Paolo Bonzini , "rkrcmar@redhat.com" , "kvm@vger.kernel.org" , Boris Ostrovsky Subject: Re: [PATCH 1/2] KVM: SVM: Fix workaround for AMD Errata 1096 Message-ID: <20190716194107.GA28096@linux.intel.com> References: <1ef0f594-2039-1aeb-4fe0-edbc21fa1f60@amd.com> <20190716164151.GC1987@linux.intel.com> <60D01C4B-EC2E-453E-B5F6-BBE8FA94E31D@oracle.com> <015b03bc-8518-2066-c916-f5e12dd2d506@amd.com> <174F27B9-2C6B-4B9F-8091-56FA85B32BB2@oracle.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <174F27B9-2C6B-4B9F-8091-56FA85B32BB2@oracle.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Tue, Jul 16, 2019 at 10:34:08PM +0300, Liran Alon wrote: > If we really want to be pedantic, we can parse guest page-tables to see if PTE > have U/S bit set to 1. What do you think? Performance aside, walking the guest page tables would fall apart if a different vCPU modified the guest's page tables.