From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 202EEC7618B for ; Thu, 25 Jul 2019 15:36:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E1352229F3 for ; Thu, 25 Jul 2019 15:36:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1564068997; bh=HUQQhjWgjE3MnHs6ZVe3YGu0kKBa3SyqvF22FPREJyk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=b2MRNYRZQQAIQlsuB0QpCjocqGq0VToQCTnhbA+hvf+fjaTtm+MPZz3gLuVUtmhFs oIFypa2Ref6XcQiMSmpDi3EwfHjaecV8JTYwl70GQUcfZ46e0Db+q39FzXTs4rB7Ei bMfKzWfg9c9SG7yJ2sbQjwtIBnIPrOw/+SPS3GIA= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728383AbfGYPgg (ORCPT ); Thu, 25 Jul 2019 11:36:36 -0400 Received: from foss.arm.com ([217.140.110.172]:59518 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728345AbfGYPgf (ORCPT ); Thu, 25 Jul 2019 11:36:35 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1512C1688; Thu, 25 Jul 2019 08:36:35 -0700 (PDT) Received: from filthy-habits.cambridge.arm.com (filthy-habits.cambridge.arm.com [10.1.197.61]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 64DBE3F71A; Thu, 25 Jul 2019 08:36:33 -0700 (PDT) From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: Marc Zyngier , Julien Thierry , James Morse , Suzuki K Poulose , Christoffer Dall , Eric Auger , Andre Przywara , Zenghui Yu , "Raslan, KarimAllah" , "Saidi, Ali" Subject: [PATCH v3 05/10] KVM: arm/arm64: vgic-its: Invalidate MSI-LPI translation cache on disabling LPIs Date: Thu, 25 Jul 2019 16:35:38 +0100 Message-Id: <20190725153543.24386-6-maz@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190725153543.24386-1-maz@kernel.org> References: <20190725153543.24386-1-maz@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Marc Zyngier If a vcpu disables LPIs at its redistributor level, we need to make sure we won't pend more interrupts. For this, we need to invalidate the LPI translation cache. Signed-off-by: Marc Zyngier --- virt/kvm/arm/vgic/vgic-mmio-v3.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/virt/kvm/arm/vgic/vgic-mmio-v3.c b/virt/kvm/arm/vgic/vgic-mmio-v3.c index 936962abc38d..cb60da48810d 100644 --- a/virt/kvm/arm/vgic/vgic-mmio-v3.c +++ b/virt/kvm/arm/vgic/vgic-mmio-v3.c @@ -192,8 +192,10 @@ static void vgic_mmio_write_v3r_ctlr(struct kvm_vcpu *vcpu, vgic_cpu->lpis_enabled = val & GICR_CTLR_ENABLE_LPIS; - if (was_enabled && !vgic_cpu->lpis_enabled) + if (was_enabled && !vgic_cpu->lpis_enabled) { vgic_flush_pending_lpis(vcpu); + vgic_its_invalidate_cache(vcpu->kvm); + } if (!was_enabled && vgic_cpu->lpis_enabled) vgic_enable_lpis(vcpu); -- 2.20.1