From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Yang Weijiang <weijiang.yang@intel.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
pbonzini@redhat.com, mst@redhat.com, rkrcmar@redhat.com,
jmattson@google.com
Subject: Re: [PATCH v6 4/8] KVM: VMX: Pass through CET related MSRs to Guest
Date: Mon, 12 Aug 2019 16:53:41 -0700 [thread overview]
Message-ID: <20190812235341.GG4996@linux.intel.com> (raw)
In-Reply-To: <20190725031246.8296-5-weijiang.yang@intel.com>
On Thu, Jul 25, 2019 at 11:12:42AM +0800, Yang Weijiang wrote:
> CET MSRs pass through Guest directly to enhance performance.
> CET runtime control settings are stored in MSR_IA32_{U,S}_CET,
> Shadow Stack Pointer(SSP) are stored in MSR_IA32_PL{0,1,2,3}_SSP,
> SSP table base address is stored in MSR_IA32_INT_SSP_TAB,
> these MSRs are defined in kernel and re-used here.
>
> MSR_IA32_U_CET and MSR_IA32_PL3_SSP are used for user mode protection,
> the contents could differ from process to process, therefore,
> kernel needs to save/restore them during context switch, it makes
> sense to pass through them so that the guest kernel can
> use xsaves/xrstors to operate them efficiently. Other MSRs are used
> for non-user mode protection. See CET spec for detailed info.
>
> The difference between CET VMCS state fields and xsave components is that,
> the former used for CET state storage during VMEnter/VMExit,
> whereas the latter used for state retention between Guest task/process
> switch.
>
> Co-developed-by: Zhang Yi Z <yi.z.zhang@linux.intel.com>
> Signed-off-by: Zhang Yi Z <yi.z.zhang@linux.intel.com>
> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> ---
> arch/x86/kvm/vmx/vmx.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index ce1d6fe21780..ce5d1e45b7a5 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -6952,6 +6952,7 @@ static void update_intel_pt_cfg(struct kvm_vcpu *vcpu)
> static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
> {
> struct vcpu_vmx *vmx = to_vmx(vcpu);
> + unsigned long *msr_bitmap;
>
> if (cpu_has_secondary_exec_ctrls()) {
> vmx_compute_secondary_exec_control(vmx);
> @@ -6973,6 +6974,19 @@ static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
> if (boot_cpu_has(X86_FEATURE_INTEL_PT) &&
> guest_cpuid_has(vcpu, X86_FEATURE_INTEL_PT))
> update_intel_pt_cfg(vcpu);
> +
> + msr_bitmap = vmx->vmcs01.msr_bitmap;
> +
> + if (guest_cpuid_has(vcpu, X86_FEATURE_SHSTK) ||
> + guest_cpuid_has(vcpu, X86_FEATURE_IBT)) {
These should be exposed to the guest if and only if they're supported in
the host and guest, i.e. kvm_supported_xss() needs to be checked. And,
again assuming USER and KERNEL can be virtualized independently, the logic
needs to account for exposting USER but KERNEL and vice versa.
> + vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_U_CET, MSR_TYPE_RW);
> + vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_S_CET, MSR_TYPE_RW);
> + vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_INT_SSP_TAB, MSR_TYPE_RW);
> + vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_PL0_SSP, MSR_TYPE_RW);
> + vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_PL1_SSP, MSR_TYPE_RW);
> + vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_PL2_SSP, MSR_TYPE_RW);
> + vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_PL3_SSP, MSR_TYPE_RW);
The SSP MSRs should only be passed through if the guest has SHSTK, e.g.
KVM should intercept RDMSR and WRMSR to inject #GP in those cases.
> + }
> }
>
> static void vmx_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry)
> --
> 2.17.2
>
next prev parent reply other threads:[~2019-08-12 23:53 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-25 3:12 [PATCH v6 0/8] Introduce support for Guest CET feature Yang Weijiang
2019-07-25 3:12 ` [PATCH v6 1/8] KVM: VMX: Define CET VMCS fields and control bits Yang Weijiang
2019-07-25 3:12 ` [PATCH v6 2/8] KVM: x86: Add a helper function for CPUID(0xD,n>=1) enumeration Yang Weijiang
2019-08-12 22:18 ` Sean Christopherson
2019-08-13 6:11 ` Yang Weijiang
2019-07-25 3:12 ` [PATCH v6 3/8] KVM: x86: Implement CET CPUID enumeration for Guest Yang Weijiang
2019-08-13 0:06 ` Sean Christopherson
2019-08-13 5:27 ` Yang Weijiang
2019-07-25 3:12 ` [PATCH v6 4/8] KVM: VMX: Pass through CET related MSRs to Guest Yang Weijiang
2019-08-12 23:53 ` Sean Christopherson [this message]
2019-08-13 5:49 ` Yang Weijiang
2019-07-25 3:12 ` [PATCH v6 5/8] KVM: VMX: Load Guest CET via VMCS when CET is enabled in Guest Yang Weijiang
2019-08-12 23:56 ` Sean Christopherson
2019-08-13 5:38 ` Yang Weijiang
2019-07-25 3:12 ` [PATCH v6 6/8] KVM: x86: Add CET bits setting in CR4 and XSS Yang Weijiang
2019-07-25 3:12 ` [PATCH v6 7/8] KVM: x86: Load Guest fpu state when accessing MSRs managed by XSAVES Yang Weijiang
2019-08-12 23:02 ` Sean Christopherson
2019-08-12 23:04 ` Sean Christopherson
2019-08-12 23:29 ` Sean Christopherson
2019-08-13 6:06 ` Yang Weijiang
2019-08-13 6:05 ` Yang Weijiang
2019-07-25 3:12 ` [PATCH v6 8/8] KVM: x86: Add user-space access interface for CET MSRs Yang Weijiang
2019-08-12 23:43 ` Sean Christopherson
2019-08-13 5:41 ` Yang Weijiang
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