From: Oliver Upton <oupton@google.com>
To: kvm@vger.kernel.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Radim Krčmář" <rkrcmar@redhat.com>
Cc: Jim Mattson <jmattson@google.com>,
Peter Shier <pshier@google.com>,
Krish Sadhukhan <krish.sadhukhan@oracle.com>,
Sean Christopherson <sean.j.christopherson@intel.com>
Subject: Re: [PATCH v2 3/8] KVM: VMX: Add helper to check reserved bits in IA32_PERF_GLOBAL_CTRL
Date: Tue, 3 Sep 2019 14:39:47 -0700 [thread overview]
Message-ID: <20190903213947.GA177933@google.com> (raw)
In-Reply-To: <20190903213044.168494-4-oupton@google.com>
On Tue, Sep 03, 2019 at 02:30:39PM -0700, Oliver Upton wrote:
> Create a helper function to check the validity of a proposed value for
> IA32_PERF_GLOBAL_CTRL from the existing check in intel_pmu_set_msr().
Clobbered my updated commit message. Will fix with the other comment
below.
> Suggested-by: Jim Mattson <jmattson@google.com>
> Co-developed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
> Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
> Signed-off-by: Oliver Upton <oupton@google.com>
> ---
> arch/x86/kvm/pmu.h | 6 ++++++
> arch/x86/kvm/vmx/pmu_intel.c | 2 +-
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h
> index 58265f761c3b..779427b44c2f 100644
> --- a/arch/x86/kvm/pmu.h
> +++ b/arch/x86/kvm/pmu.h
> @@ -79,6 +79,12 @@ static inline bool pmc_is_enabled(struct kvm_pmc *pmc)
> return kvm_x86_ops->pmu_ops->pmc_is_enabled(pmc);
> }
>
> +static inline bool kvm_is_valid_perf_global_ctrl(struct kvm_pmu *pmu,
> + u64 data)
> +{
> + return pmu->global_ctrl == data || !(pmu->global_ctrl_mask & data);
Going to resend this one more time. Just had a conversation with Jim
offline and decided that the 'pmu->global_ctrl == data' check (as seen
in intel_pmu_set_msr()) isn't really providing us anything here.
> +}
> +
> /* returns general purpose PMC with the specified MSR. Note that it can be
> * used for both PERFCTRn and EVNTSELn; that is why it accepts base as a
> * paramenter to tell them apart.
> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
> index 4dea0e0e7e39..963766d631ad 100644
> --- a/arch/x86/kvm/vmx/pmu_intel.c
> +++ b/arch/x86/kvm/vmx/pmu_intel.c
> @@ -223,7 +223,7 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> case MSR_CORE_PERF_GLOBAL_CTRL:
> if (pmu->global_ctrl == data)
> return 0;
> - if (!(data & pmu->global_ctrl_mask)) {
> + if (kvm_is_valid_perf_global_ctrl(pmu, data)) {
> global_ctrl_changed(pmu, data);
> return 0;
> }
> --
> 2.23.0.187.g17f5b7556c-goog
>
next prev parent reply other threads:[~2019-09-03 21:39 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-03 21:30 [PATCH v2 0/8] KVM: VMX: Add full nested support for IA32_PERF_GLOBAL_CTRL Oliver Upton
2019-09-03 21:30 ` [PATCH v2 1/8] KVM: nVMX: Use kvm_set_msr to load IA32_PERF_GLOBAL_CTRL on vmexit Oliver Upton
2019-09-03 21:30 ` [PATCH v2 2/8] KVM: nVMX: Load GUEST_IA32_PERF_GLOBAL_CTRL MSR on vm-entry Oliver Upton
2019-09-03 21:30 ` [PATCH v2 3/8] KVM: VMX: Add helper to check reserved bits in IA32_PERF_GLOBAL_CTRL Oliver Upton
2019-09-03 21:39 ` Oliver Upton [this message]
2019-09-03 21:30 ` [PATCH v2 4/8] KVM: nVMX: check GUEST_IA32_PERF_GLOBAL_CTRL on VM-Entry Oliver Upton
2019-09-03 21:30 ` [PATCH v2 5/8] KVM: nVMX: Check HOST_IA32_PERF_GLOBAL_CTRL on VM-entry Oliver Upton
2019-09-03 21:30 ` [PATCH v2 6/8] KVM: nVMX: Expose load IA32_PERF_GLOBAL_CTRL vm control if supported Oliver Upton
2019-09-03 21:30 ` [kvm-unit-tests PATCH v2 7/8] x86: VMX: Make guest_state_test_main() check state from nested VM Oliver Upton
2019-09-03 21:30 ` [kvm-unit-tests PATCH v2 8/8] x86: VMX: Add tests for nested "load IA32_PERF_GLOBAL_CTRL" Oliver Upton
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