From: Oliver Upton <oupton@google.com>
To: kvm@vger.kernel.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Radim Krčmář" <rkrcmar@redhat.com>
Cc: Jim Mattson <jmattson@google.com>,
Peter Shier <pshier@google.com>,
Krish Sadhukhan <krish.sadhukhan@oracle.com>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Oliver Upton <oupton@google.com>
Subject: [PATCH v4 6/9] KVM: nVMX: Expose load IA32_PERF_GLOBAL_CTRL vm control if supported
Date: Fri, 6 Sep 2019 14:03:10 -0700 [thread overview]
Message-ID: <20190906210313.128316-7-oupton@google.com> (raw)
In-Reply-To: <20190906210313.128316-1-oupton@google.com>
The "load IA32_PERF_GLOBAL_CTRL" bit for VM-entry and VM-exit should
only be exposed to the guest if IA32_PERF_GLOBAL_CTRL is a valid MSR.
Create a new helper to allow pmu_refresh() to update the VM-entry and
VM-exit controls to ensure PMU values are initialized when performing
the is_valid_msr() check.
Suggested-by: Jim Mattson <jmattson@google.com>
Co-developed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Oliver Upton <oupton@google.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Reviewed-by: Peter Shier <pshier@google.com>
---
arch/x86/kvm/vmx/pmu_intel.c | 3 +++
arch/x86/kvm/vmx/vmx.c | 21 +++++++++++++++++++++
arch/x86/kvm/vmx/vmx.h | 1 +
3 files changed, 25 insertions(+)
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 963766d631ad..2dc7be724321 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -16,6 +16,7 @@
#include "cpuid.h"
#include "lapic.h"
#include "pmu.h"
+#include "vmx.h"
static struct kvm_event_hw_type_mapping intel_arch_events[] = {
/* Index must match CPUID 0x0A.EBX bit vector */
@@ -314,6 +315,8 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
(boot_cpu_has(X86_FEATURE_HLE) || boot_cpu_has(X86_FEATURE_RTM)) &&
(entry->ebx & (X86_FEATURE_HLE|X86_FEATURE_RTM)))
pmu->reserved_bits ^= HSW_IN_TX|HSW_IN_TX_CHECKPOINTED;
+
+ nested_vmx_pmu_entry_exit_ctls_update(vcpu);
}
static void intel_pmu_init(struct kvm_vcpu *vcpu)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 570a233e272b..5b0664bff23b 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -6417,6 +6417,27 @@ void vmx_update_host_rsp(struct vcpu_vmx *vmx, unsigned long host_rsp)
}
}
+void nested_vmx_pmu_entry_exit_ctls_update(struct kvm_vcpu *vcpu)
+{
+ struct vcpu_vmx *vmx;
+
+ if (!nested_vmx_allowed(vcpu))
+ return;
+
+ vmx = to_vmx(vcpu);
+ if (intel_pmu_ops.is_valid_msr(vcpu, MSR_CORE_PERF_GLOBAL_CTRL)) {
+ vmx->nested.msrs.entry_ctls_high |=
+ VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL;
+ vmx->nested.msrs.exit_ctls_high |=
+ VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL;
+ } else {
+ vmx->nested.msrs.entry_ctls_high &=
+ ~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL;
+ vmx->nested.msrs.exit_ctls_high &=
+ ~VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL;
+ }
+}
+
bool __vmx_vcpu_run(struct vcpu_vmx *vmx, unsigned long *regs, bool launched);
static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index 82d0bc3a4d52..e06884cf88ad 100644
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -331,6 +331,7 @@ void vmx_set_virtual_apic_mode(struct kvm_vcpu *vcpu);
struct shared_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr);
void pt_update_intercept_for_msr(struct vcpu_vmx *vmx);
void vmx_update_host_rsp(struct vcpu_vmx *vmx, unsigned long host_rsp);
+void nested_vmx_pmu_entry_exit_ctls_update(struct kvm_vcpu *vcpu);
#define POSTED_INTR_ON 0
#define POSTED_INTR_SN 1
--
2.23.0.187.g17f5b7556c-goog
next prev parent reply other threads:[~2019-09-06 21:03 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-06 21:03 [PATCH v4 0/9] KVM: VMX: Add full nested support for IA32_PERF_GLOBAL_CTRL Oliver Upton
2019-09-06 21:03 ` [PATCH v4 1/9] KVM: nVMX: Use kvm_set_msr to load IA32_PERF_GLOBAL_CTRL on vmexit Oliver Upton
2019-09-16 18:03 ` Sean Christopherson
2019-09-16 18:15 ` Sean Christopherson
2019-09-06 21:03 ` [PATCH v4 2/9] KVM: nVMX: Load GUEST_IA32_PERF_GLOBAL_CTRL MSR on vm-entry Oliver Upton
2019-09-16 18:06 ` Sean Christopherson
2019-09-16 21:17 ` Oliver Upton
2019-09-16 22:50 ` Sean Christopherson
2019-09-06 21:03 ` [PATCH v4 3/9] KVM: VMX: Add helper to check reserved bits in IA32_PERF_GLOBAL_CTRL Oliver Upton
2019-09-06 21:03 ` [PATCH v4 4/9] KVM: nVMX: check GUEST_IA32_PERF_GLOBAL_CTRL on VM-Entry Oliver Upton
2019-09-16 18:10 ` Sean Christopherson
2019-09-16 21:19 ` Oliver Upton
2019-09-06 21:03 ` [PATCH v4 5/9] KVM: nVMX: Check HOST_IA32_PERF_GLOBAL_CTRL on VM-entry Oliver Upton
2019-09-16 18:10 ` Sean Christopherson
2019-09-06 21:03 ` Oliver Upton [this message]
2019-09-16 18:27 ` [PATCH v4 6/9] KVM: nVMX: Expose load IA32_PERF_GLOBAL_CTRL vm control if supported Sean Christopherson
2019-09-06 21:03 ` [kvm-unit-test PATCH v4 7/9] vmx: Allow vmx_tests to reset the test_guest_func Oliver Upton
2019-09-10 20:49 ` Krish Sadhukhan
2019-09-06 21:03 ` [kvm-unit-tests PATCH v4 8/9] x86: VMX: Make guest_state_test_main() check state from nested VM Oliver Upton
2019-09-10 20:51 ` Krish Sadhukhan
2019-09-06 21:03 ` [kvm-unit-tests PATCH v4 9/9] x86: VMX: Add tests for nested "load IA32_PERF_GLOBAL_CTRL" Oliver Upton
2019-09-12 16:28 ` Krish Sadhukhan
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