From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Jim Mattson <jmattson@google.com>
Cc: Marc Orr <marcorr@google.com>, kvm list <kvm@vger.kernel.org>,
Peter Shier <pshier@google.com>
Subject: Re: [kvm-unit-tests PATCH] x86: nvmx: test max atomic switch MSRs
Date: Fri, 13 Sep 2019 10:15:22 -0700 [thread overview]
Message-ID: <20190913171522.GD31125@linux.intel.com> (raw)
In-Reply-To: <CALMp9eQmQ1NKAd8qS9jj5Ff0LWV_UmFLJm4A5knBpzEz=ofirg@mail.gmail.com>
On Fri, Sep 13, 2019 at 09:26:04AM -0700, Jim Mattson wrote:
> On Fri, Sep 13, 2019 at 8:24 AM Sean Christopherson
> <sean.j.christopherson@intel.com> wrote:
>
> > This is a misleading name, e.g. it took me quite a while to realize this
> > is testing only the passing scenario. For me, "limit test" implies that
> > it'd be deliberately exceeding the limit, or at least testing both the
> > passing and failing cases. I suppose we can't easily test the VMX abort
> > cases, but we can at least test VM_ENTER_LOAD.
>
> It's hard to test for "undefined behavior may result." :-)
Fortune favors the bold?
> One could check to see if the test is running under KVM, and then
> check for the behavior that Marc's other patch introduces, but even
> that is implementation-dependent.
Hmm, what if kvm-unit-tests accepts both VM-Enter success and fail as
passing conditions? We can at least verify KVM doesn't explode, and if
VM-Enter fails, that the exit qual is correct.
The SDM state that the max is a recommendation, which leads me to believe
that bare metal will work just fine if the software exceeds the
recommended max by an entry or two, but can run into trouble if the list
is ludicrously big. There's no way the CPU is tuned so finely that it
works at N but fails at N+1.
next prev parent reply other threads:[~2019-09-13 17:15 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-12 18:09 [kvm-unit-tests PATCH] x86: nvmx: test max atomic switch MSRs Marc Orr
2019-09-13 15:24 ` Sean Christopherson
2019-09-13 16:26 ` Jim Mattson
2019-09-13 17:15 ` Sean Christopherson [this message]
2019-09-13 17:21 ` Jim Mattson
2019-09-13 18:02 ` Marc Orr
2019-09-13 18:30 ` Sean Christopherson
2019-09-13 21:55 ` Marc Orr
2019-09-14 0:49 ` Marc Orr
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190913171522.GD31125@linux.intel.com \
--to=sean.j.christopherson@intel.com \
--cc=jmattson@google.com \
--cc=kvm@vger.kernel.org \
--cc=marcorr@google.com \
--cc=pshier@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).