From: Igor Mammedov <imammedo@redhat.com> To: Beata Michalska <beata.michalska@linaro.org> Cc: Xiang Zheng <zhengxiang9@huawei.com>, Peter Maydell <peter.maydell@linaro.org>, ehabkost@redhat.com, kvm@vger.kernel.org, mst@redhat.com, wanghaibin.wang@huawei.com, mtosatti@redhat.com, linuxarm@huawei.com, qemu-devel@nongnu.org, gengdongjiu@huawei.com, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, james.morse@arm.com, xuwei5@huawei.com, jonathan.cameron@huawei.com, pbonzini@redhat.com, Laszlo Ersek <lersek@redhat.com>, rth@twiddle.net Subject: Re: [RESEND PATCH v21 5/6] target-arm: kvm64: handle SIGBUS signal from kernel or KVM Date: Mon, 25 Nov 2019 10:37:06 +0100 Message-ID: <20191125103706.46300ff1@redhat.com> (raw) In-Reply-To: <CADSWDzsg9aMCbbLadmc+twmJw3dZvRYgqKKWsDQRiJSRS7=GDQ@mail.gmail.com> On Fri, 22 Nov 2019 15:47:24 +0000 Beata Michalska <beata.michalska@linaro.org> wrote: > Hi, > > On Fri, 15 Nov 2019 at 16:54, Igor Mammedov <imammedo@redhat.com> wrote: > > > > On Mon, 11 Nov 2019 09:40:47 +0800 > > Xiang Zheng <zhengxiang9@huawei.com> wrote: > > > > > From: Dongjiu Geng <gengdongjiu@huawei.com> > > > > > > Add a SIGBUS signal handler. In this handler, it checks the SIGBUS type, > > > translates the host VA delivered by host to guest PA, then fills this PA > > > to guest APEI GHES memory, then notifies guest according to the SIGBUS > > > type. > > > > > > When guest accesses the poisoned memory, it will generate a Synchronous > > > External Abort(SEA). Then host kernel gets an APEI notification and calls > > > memory_failure() to unmapped the affected page in stage 2, finally > > > returns to guest. > > > > > > Guest continues to access the PG_hwpoison page, it will trap to KVM as > > > stage2 fault, then a SIGBUS_MCEERR_AR synchronous signal is delivered to > > > Qemu, Qemu records this error address into guest APEI GHES memory and > > > notifes guest using Synchronous-External-Abort(SEA). > > > > > > In order to inject a vSEA, we introduce the kvm_inject_arm_sea() function > > > in which we can setup the type of exception and the syndrome information. > > > When switching to guest, the target vcpu will jump to the synchronous > > > external abort vector table entry. > > > > > > The ESR_ELx.DFSC is set to synchronous external abort(0x10), and the > > > ESR_ELx.FnV is set to not valid(0x1), which will tell guest that FAR is > > > not valid and hold an UNKNOWN value. These values will be set to KVM > > > register structures through KVM_SET_ONE_REG IOCTL. > > > > > > Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> > > > Signed-off-by: Xiang Zheng <zhengxiang9@huawei.com> > > > Reviewed-by: Michael S. Tsirkin <mst@redhat.com> > > > --- > > > hw/acpi/acpi_ghes.c | 297 ++++++++++++++++++++++++++++++++++++ [...] > > > +static int acpi_ghes_record_mem_error(uint64_t error_block_address, > > > + uint64_t error_physical_addr, > > > + uint32_t data_length) > > > +{ > > > + GArray *block; > > > + uint64_t current_block_length; > > > + /* Memory Error Section Type */ > > > + QemuUUID mem_section_id_le = UEFI_CPER_SEC_PLATFORM_MEM; > > ^^ > > UEFI_CPER_SEC_PLATFORM_MEM is defined as BE, so _le here is wrong > > and then later you use qemu_uuid_bswap() to make it LE. > > > > Why not define it as LE to begin with, like it's been done for NVDIMM_UUID_LE? > > > Is there a chance to make it common for both ? sure, it just should be a separate patch. Maybe put it in include/qemu/uuid.h or maybe make qemu_uuid_parse() return QemuUUID so we could initialize like this: QemuUUID mem_section_id_le = qemu_uuid_parse("00000000-0000-0000-0000-000000000000", &error_abort); where used UUID value is easy to read and compare with spec. [...]
next prev parent reply index Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-11 1:40 [RESEND PATCH v21 0/6] Add ARMv8 RAS virtualization support in QEMU Xiang Zheng 2019-11-11 1:40 ` [RESEND PATCH v21 1/6] hw/arm/virt: Introduce a RAS machine option Xiang Zheng 2019-12-02 18:22 ` Peter Maydell 2019-12-07 12:10 ` gengdongjiu 2019-11-11 1:40 ` [RESEND PATCH v21 2/6] docs: APEI GHES generation and CPER record description Xiang Zheng 2019-11-15 9:44 ` Igor Mammedov 2019-11-27 1:37 ` Xiang Zheng 2019-11-27 8:12 ` Igor Mammedov 2019-11-11 1:40 ` [RESEND PATCH v21 3/6] ACPI: Add APEI GHES table generation support Xiang Zheng 2019-11-15 9:38 ` Igor Mammedov 2019-11-18 12:49 ` gengdongjiu 2019-11-18 13:18 ` gengdongjiu 2019-11-18 13:21 ` Michael S. Tsirkin 2019-11-18 13:57 ` gengdongjiu 2019-11-25 9:48 ` Igor Mammedov 2019-11-27 11:16 ` gengdongjiu 2019-11-22 15:44 ` Beata Michalska 2019-11-22 15:42 ` Beata Michalska 2019-11-25 9:23 ` Igor Mammedov 2019-11-11 1:40 ` [RESEND PATCH v21 4/6] KVM: Move hwpoison page related functions into kvm-all.c Xiang Zheng 2019-12-02 18:23 ` Peter Maydell 2019-11-11 1:40 ` [RESEND PATCH v21 5/6] target-arm: kvm64: handle SIGBUS signal from kernel or KVM Xiang Zheng 2019-11-15 16:37 ` Igor Mammedov 2019-11-22 15:47 ` Beata Michalska 2019-11-25 9:37 ` Igor Mammedov [this message] 2019-11-27 1:40 ` Xiang Zheng 2019-11-27 10:43 ` Igor Mammedov 2019-12-21 12:35 ` gengdongjiu 2019-11-22 15:47 ` Beata Michalska 2019-11-27 12:47 ` Xiang Zheng 2019-11-27 13:02 ` Igor Mammedov 2019-11-27 14:17 ` Beata Michalska 2019-12-03 3:35 ` Xiang Zheng 2019-11-27 14:17 ` Beata Michalska 2019-12-03 3:35 ` Xiang Zheng 2019-12-07 9:33 ` gengdongjiu 2019-12-09 13:05 ` Beata Michalska 2019-12-09 14:12 ` gengdongjiu 2019-11-11 1:40 ` [RESEND PATCH v21 6/6] MAINTAINERS: Add APCI/APEI/GHES entries Xiang Zheng 2019-12-02 18:27 ` [RESEND PATCH v21 0/6] Add ARMv8 RAS virtualization support in QEMU Peter Maydell 2019-12-03 2:09 ` gengdongjiu
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