From: Yang Weijiang <weijiang.yang@intel.com>
To: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: Yang Weijiang <weijiang.yang@intel.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
pbonzini@redhat.com, jmattson@google.com,
yu.c.zhang@linux.intel.com, yu-cheng.yu@intel.com
Subject: Re: [PATCH v8 4/7] KVM: VMX: Load CET states on vmentry/vmexit
Date: Wed, 11 Dec 2019 09:54:23 +0800 [thread overview]
Message-ID: <20191211015423.GC12845@local-michael-cet-test> (raw)
In-Reply-To: <20191210212305.GM15758@linux.intel.com>
On Tue, Dec 10, 2019 at 01:23:05PM -0800, Sean Christopherson wrote:
> On Fri, Nov 01, 2019 at 04:52:19PM +0800, Yang Weijiang wrote:
> > @@ -2834,6 +2837,9 @@ void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
> > struct vcpu_vmx *vmx = to_vmx(vcpu);
> > unsigned long hw_cr0;
> >
> > + if (!(cr0 & X86_CR0_WP) && kvm_read_cr4_bits(vcpu, X86_CR4_CET))
> > + cr0 |= X86_CR0_WP;
>
> Huh? What's the interaction between CR4.CET and CR0.WP? If there really
> is some non-standard interaction then it needs to be documented in at least
> the changelog and probably with a comment as well.
>
The processor does not allow CR4.CET to be set if CR0.WP = 0 (similarly, it does not allow CR0.WP to be
cleared while CR4.CET = 1).
> > +
> > hw_cr0 = (cr0 & ~KVM_VM_CR0_ALWAYS_OFF);
> > if (enable_unrestricted_guest)
> > hw_cr0 |= KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST;
> > @@ -2936,6 +2942,22 @@ static bool guest_cet_allowed(struct kvm_vcpu *vcpu, u32 feature, u32 mode)
> > return false;
> > }
> >
> > +bool is_cet_bit_allowed(struct kvm_vcpu *vcpu)
> > +{
> > + unsigned long cr0;
> > + bool cet_allowed;
> > +
> > + cr0 = kvm_read_cr0(vcpu);
> > + cet_allowed = guest_cet_allowed(vcpu, X86_FEATURE_SHSTK,
> > + XFEATURE_MASK_CET_USER) ||
> > + guest_cet_allowed(vcpu, X86_FEATURE_IBT,
> > + XFEATURE_MASK_CET_USER);
> > + if ((cr0 & X86_CR0_WP) && cet_allowed)
> > + return true;
>
> So, attempting to set CR4.CET if CR0.WP=0 takes a #GP? But attempting
> to clear CR0.WP if CR4.CET=1 is ignored?
>
Per above words in spec., inject #GP to guest in either case?
> > +
> > + return false;
> > +}
> > +
> > int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
> > {
> > struct vcpu_vmx *vmx = to_vmx(vcpu);
> > @@ -2976,6 +2998,9 @@ int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
> > return 1;
> > }
> >
> > + if ((cr4 & X86_CR4_CET) && !is_cet_bit_allowed(vcpu))
> > + return 1;
> > +
> > if (vmx->nested.vmxon && !nested_cr4_valid(vcpu, cr4))
> > return 1;
> >
> > @@ -3839,6 +3864,12 @@ void vmx_set_constant_host_state(struct vcpu_vmx *vmx)
> >
> > if (cpu_has_load_ia32_efer())
> > vmcs_write64(HOST_IA32_EFER, host_efer);
> > +
> > + if (cpu_has_load_host_cet_states_ctrl()) {
> > + vmcs_writel(HOST_S_CET, 0);
> > + vmcs_writel(HOST_INTR_SSP_TABLE, 0);
> > + vmcs_writel(HOST_SSP, 0);
> > + }
> > }
> >
> > void set_cr4_guest_host_mask(struct vcpu_vmx *vmx)
> > @@ -6436,6 +6467,7 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
> > {
> > struct vcpu_vmx *vmx = to_vmx(vcpu);
> > unsigned long cr3, cr4;
> > + bool cet_allowed;
> >
> > /* Record the guest's net vcpu time for enforced NMI injections. */
> > if (unlikely(!enable_vnmi &&
> > @@ -6466,6 +6498,25 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
> > vmx->loaded_vmcs->host_state.cr3 = cr3;
> > }
> >
> > + /* To be aligned with kernel code, only user mode is supported now. */
> > + cet_allowed = guest_cet_allowed(vcpu, X86_FEATURE_SHSTK,
> > + XFEATURE_MASK_CET_USER) ||
> > + guest_cet_allowed(vcpu, X86_FEATURE_IBT,
> > + XFEATURE_MASK_CET_USER);
> > + if (cpu_has_load_guest_cet_states_ctrl() && cet_allowed)
> > + vmcs_set_bits(VM_ENTRY_CONTROLS,
> > + VM_ENTRY_LOAD_GUEST_CET_STATE);
> > + else
> > + vmcs_clear_bits(VM_ENTRY_CONTROLS,
> > + VM_ENTRY_LOAD_GUEST_CET_STATE);
> > +
> > + if (cpu_has_load_host_cet_states_ctrl() && cet_allowed)
> > + vmcs_set_bits(VM_EXIT_CONTROLS,
> > + VM_EXIT_LOAD_HOST_CET_STATE);
> > + else
> > + vmcs_clear_bits(VM_EXIT_CONTROLS,
> > + VM_EXIT_LOAD_HOST_CET_STATE);
> > +
> > cr4 = cr4_read_shadow();
> > if (unlikely(cr4 != vmx->loaded_vmcs->host_state.cr4)) {
> > vmcs_writel(HOST_CR4, cr4);
> > --
> > 2.17.2
> >
next prev parent reply other threads:[~2019-12-11 1:53 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-01 8:52 [PATCH v8 0/7] Introduce support for guest CET feature Yang Weijiang
2019-11-01 8:52 ` [PATCH v8 1/7] KVM: CPUID: Fix IA32_XSS support in CPUID(0xd,i) enumeration Yang Weijiang
2019-11-01 8:52 ` [PATCH v8 2/7] KVM: VMX: Define CET VMCS fields and #CP flag Yang Weijiang
2019-12-10 21:00 ` Sean Christopherson
2019-12-11 1:45 ` Yang Weijiang
2019-11-01 8:52 ` [PATCH v8 3/7] KVM: VMX: Pass through CET related MSRs Yang Weijiang
2019-12-10 21:18 ` Sean Christopherson
2019-12-11 1:32 ` Yang Weijiang
2019-12-11 1:50 ` Sean Christopherson
2019-12-11 2:27 ` Yang Weijiang
2019-12-16 2:18 ` Yang Weijiang
2019-12-18 0:34 ` Sean Christopherson
2019-12-18 13:55 ` Yang Weijiang
2019-12-18 16:02 ` Sean Christopherson
2019-11-01 8:52 ` [PATCH v8 4/7] KVM: VMX: Load CET states on vmentry/vmexit Yang Weijiang
2019-12-10 21:23 ` Sean Christopherson
2019-12-11 1:54 ` Yang Weijiang [this message]
2019-12-11 16:35 ` Sean Christopherson
2019-12-12 1:04 ` Yang Weijiang
2019-12-18 0:30 ` Sean Christopherson
2019-12-18 13:20 ` Yang Weijiang
2019-11-01 8:52 ` [PATCH v8 5/7] KVM: X86: Enable CET bits update in IA32_XSS Yang Weijiang
2019-11-01 8:52 ` [PATCH v8 6/7] KVM: X86: Load guest fpu state when accessing MSRs managed by XSAVES Yang Weijiang
2019-12-10 21:27 ` Sean Christopherson
2019-12-11 2:03 ` Yang Weijiang
2019-11-01 8:52 ` [PATCH v8 7/7] KVM: X86: Add user-space access interface for CET MSRs Yang Weijiang
2019-12-10 21:58 ` Sean Christopherson
2019-12-11 2:19 ` Yang Weijiang
2019-12-11 16:27 ` Sean Christopherson
2019-12-12 0:42 ` Yang Weijiang
2019-12-12 16:03 ` [PATCH v8 0/7] Introduce support for guest CET feature Konrad Rzeszutek Wilk
2019-12-13 0:44 ` Yang Weijiang
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