From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
x86@kernel.org
Cc: "H. Peter Anvin" <hpa@zytor.com>,
"Peter Zijlstra" <peterz@infradead.org>,
"Arnaldo Carvalho de Melo" <acme@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
"Jiri Olsa" <jolsa@redhat.com>,
"Namhyung Kim" <namhyung@kernel.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Radim Krčmář" <rkrcmar@redhat.com>,
"Sean Christopherson" <sean.j.christopherson@intel.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
"Wanpeng Li" <wanpengli@tencent.com>,
"Jim Mattson" <jmattson@google.com>,
"Joerg Roedel" <joro@8bytes.org>,
"Tony Luck" <tony.luck@intel.com>,
"Tony W Wang-oc" <TonyWWang-oc@zhaoxin.com>,
"Jacob Pan" <jacob.jun.pan@linux.intel.com>,
"Len Brown" <lenb@kernel.org>, "Shuah Khan" <shuah@kernel.org>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
linux-edac@vger.kernel.org, linux-pm@vger.kernel.org,
linux-kselftest@vger.kernel.org, "Borislav Petkov" <bp@suse.de>,
"Jarkko Sakkinen" <jarkko.sakkinen@linux.intel.com>
Subject: [PATCH v5 05/19] x86/mce: WARN once if IA32_FEAT_CTL MSR is left unlocked
Date: Fri, 20 Dec 2019 20:44:59 -0800 [thread overview]
Message-ID: <20191221044513.21680-6-sean.j.christopherson@intel.com> (raw)
In-Reply-To: <20191221044513.21680-1-sean.j.christopherson@intel.com>
WARN if the IA32_FEAT_CTL MSR is somehow left unlocked now that CPU
initialization unconditionally locks the MSR.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
arch/x86/kernel/cpu/mce/intel.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c
index c238518b84a2..5627b1091b85 100644
--- a/arch/x86/kernel/cpu/mce/intel.c
+++ b/arch/x86/kernel/cpu/mce/intel.c
@@ -116,14 +116,15 @@ static bool lmce_supported(void)
/*
* BIOS should indicate support for LMCE by setting bit 20 in
* IA32_FEAT_CTL without which touching MCG_EXT_CTL will generate a #GP
- * fault.
+ * fault. The MSR must also be locked for LMCE_ENABLED to take effect.
+ * WARN if the MSR isn't locked as init_ia32_feat_ctl() unconditionally
+ * locks the MSR in the event that it wasn't already locked by BIOS.
*/
rdmsrl(MSR_IA32_FEAT_CTL, tmp);
- if ((tmp & (FEAT_CTL_LOCKED | FEAT_CTL_LMCE_ENABLED)) ==
- (FEAT_CTL_LOCKED | FEAT_CTL_LMCE_ENABLED))
- return true;
+ if (WARN_ON_ONCE(!(tmp & FEAT_CTL_LOCKED)))
+ return false;
- return false;
+ return tmp & FEAT_CTL_LMCE_ENABLED;
}
bool mce_intel_cmci_poll(void)
--
2.24.1
next prev parent reply other threads:[~2019-12-21 4:47 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-21 4:44 [PATCH v5 00/19] x86/cpu: Clean up handling of VMX features Sean Christopherson
2019-12-21 4:44 ` [PATCH v5 01/19] x86/msr-index: Clean up bit defines for IA32_FEATURE_CONTROL MSR Sean Christopherson
2019-12-21 4:44 ` [PATCH v5 02/19] selftests: kvm: Replace manual MSR defs with common msr-index.h Sean Christopherson
2019-12-21 4:44 ` [PATCH v5 03/19] tools arch x86: Sync msr-index.h from kernel sources Sean Christopherson
2019-12-21 4:44 ` [PATCH v5 04/19] x86/intel: Initialize IA32_FEAT_CTL MSR at boot Sean Christopherson
2019-12-21 4:44 ` Sean Christopherson [this message]
2019-12-21 4:45 ` [PATCH v5 06/19] x86/centaur: Use common IA32_FEAT_CTL MSR initialization Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 07/19] x86/zhaoxin: " Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 08/19] x86/cpu: Clear VMX feature flag if VMX is not fully enabled Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 09/19] x86/vmx: Introduce VMX_FEATURES_* Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 10/19] x86/cpu: Detect VMX features on Intel, Centaur and Zhaoxin CPUs Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 11/19] x86/cpu: Print VMX flags in /proc/cpuinfo using VMX_FEATURES_* Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 12/19] x86/cpu: Set synthetic VMX cpufeatures during init_ia32_feat_ctl() Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 13/19] x86/cpufeatures: Add flag to track whether MSR IA32_FEAT_CTL is configured Sean Christopherson
2020-02-25 21:49 ` Jacob Keller
2020-02-25 22:12 ` Sean Christopherson
2020-02-25 22:52 ` Jacob Keller
2020-02-25 23:29 ` Sean Christopherson
2020-02-25 23:54 ` Jacob Keller
2020-02-26 0:41 ` Jacob Keller
2020-02-26 0:42 ` Sean Christopherson
2020-02-26 0:58 ` Jacob Keller
2020-02-26 20:41 ` Jacob Keller
2020-02-26 20:57 ` Sean Christopherson
2020-02-26 21:03 ` Jacob Keller
2020-02-26 21:25 ` Sean Christopherson
2020-02-26 21:53 ` Jacob Keller
2020-02-27 2:12 ` Sean Christopherson
2020-02-27 4:20 ` Huang, Kai
2020-02-27 18:09 ` Jacob Keller
2019-12-21 4:45 ` [PATCH v5 14/19] KVM: VMX: Drop initialization of IA32_FEAT_CTL MSR Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 15/19] KVM: VMX: Use VMX feature flag to query BIOS enabling Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 16/19] KVM: VMX: Check for full VMX support when verifying CPU compatibility Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 17/19] KVM: VMX: Use VMX_FEATURE_* flags to define VMCS control bits Sean Christopherson
2020-01-13 18:32 ` Borislav Petkov
2020-01-13 18:37 ` Sean Christopherson
2020-01-13 18:38 ` Borislav Petkov
2020-01-13 18:42 ` Sean Christopherson
2020-01-13 18:52 ` [PATCH] KVM: VMX: Rename define to CPU_BASED_USE_TSC_OFFSETTING Borislav Petkov
2020-01-13 20:16 ` Sean Christopherson
2020-01-14 9:31 ` Borislav Petkov
2020-01-14 17:27 ` Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 18/19] perf/x86: Provide stubs of KVM helpers for non-Intel CPUs Sean Christopherson
2019-12-21 4:45 ` [PATCH v5 19/19] KVM: VMX: Allow KVM_INTEL when building for Centaur and/or Zhaoxin CPUs Sean Christopherson
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