From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18C74C2D0C0 for ; Sat, 21 Dec 2019 14:13:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E30BD206D3 for ; Sat, 21 Dec 2019 14:13:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1576937615; bh=TDS0rdhdMbE38HDfbQjRB785F+PnKr1WPSRRmWyQ3Oo=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=Y09ImpXsnRy4yUfdnyCtifg6wwtyrl1h0ductUIRfZCmAI1IrPisfUQNUl0ZFCpHm 6hWgtcUci3o4G+c6NApStizlBwvEANnGTKUZMk7yqY8qrOIDIux9te4XJ+vwdRJHM9 9baqw8NiMowXMdNcS2P8nFyFg7fR2NCNswqpTzoc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727034AbfLUONb (ORCPT ); Sat, 21 Dec 2019 09:13:31 -0500 Received: from inca-roads.misterjones.org ([213.251.177.50]:39526 "EHLO inca-roads.misterjones.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726650AbfLUONb (ORCPT ); Sat, 21 Dec 2019 09:13:31 -0500 Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why) by cheepnis.misterjones.org with esmtpsa (TLSv1.2:AES256-GCM-SHA384:256) (Exim 4.80) (envelope-from ) id 1iifVX-0004U0-4h; Sat, 21 Dec 2019 15:13:27 +0100 Date: Sat, 21 Dec 2019 14:13:25 +0000 From: Marc Zyngier To: Andrew Murray Cc: Catalin Marinas , Mark Rutland , will@kernel.org, Sudeep Holla , , kvmarm , linux-arm-kernel , Subject: Re: [PATCH v2 09/18] arm64: KVM: enable conditional save/restore full SPE profiling buffer controls Message-ID: <20191221141325.5a177343@why> In-Reply-To: <20191220143025.33853-10-andrew.murray@arm.com> References: <20191220143025.33853-1-andrew.murray@arm.com> <20191220143025.33853-10-andrew.murray@arm.com> Organization: Approximate X-Mailer: Claws Mail 3.17.4 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: andrew.murray@arm.com, Catalin.Marinas@arm.com, Mark.Rutland@arm.com, will@kernel.org, Sudeep.Holla@arm.com, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on cheepnis.misterjones.org); SAEximRunCond expanded to false Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, 20 Dec 2019 14:30:16 +0000 Andrew Murray wrote: [somehow managed not to do a reply all, re-sending] > From: Sudeep Holla > > Now that we can save/restore the full SPE controls, we can enable it > if SPE is setup and ready to use in KVM. It's supported in KVM only if > all the CPUs in the system supports SPE. > > However to support heterogenous systems, we need to move the check if > host supports SPE and do a partial save/restore. No. Let's just not go down that path. For now, KVM on heterogeneous systems do not get SPE. If SPE has been enabled on a guest and a CPU comes up without SPE, this CPU should fail to boot (same as exposing a feature to userspace). > > Signed-off-by: Sudeep Holla > Signed-off-by: Andrew Murray > --- > arch/arm64/kvm/hyp/debug-sr.c | 33 ++++++++++++++++----------------- > include/kvm/arm_spe.h | 6 ++++++ > 2 files changed, 22 insertions(+), 17 deletions(-) > > diff --git a/arch/arm64/kvm/hyp/debug-sr.c b/arch/arm64/kvm/hyp/debug-sr.c > index 12429b212a3a..d8d857067e6d 100644 > --- a/arch/arm64/kvm/hyp/debug-sr.c > +++ b/arch/arm64/kvm/hyp/debug-sr.c > @@ -86,18 +86,13 @@ > } > > static void __hyp_text > -__debug_save_spe_nvhe(struct kvm_cpu_context *ctxt, bool full_ctxt) > +__debug_save_spe_context(struct kvm_cpu_context *ctxt, bool full_ctxt) > { > u64 reg; > > /* Clear pmscr in case of early return */ > ctxt->sys_regs[PMSCR_EL1] = 0; > > - /* SPE present on this CPU? */ > - if (!cpuid_feature_extract_unsigned_field(read_sysreg(id_aa64dfr0_el1), > - ID_AA64DFR0_PMSVER_SHIFT)) > - return; > - > /* Yes; is it owned by higher EL? */ > reg = read_sysreg_s(SYS_PMBIDR_EL1); > if (reg & BIT(SYS_PMBIDR_EL1_P_SHIFT)) > @@ -142,7 +137,7 @@ __debug_save_spe_nvhe(struct kvm_cpu_context *ctxt, bool full_ctxt) > } > > static void __hyp_text > -__debug_restore_spe_nvhe(struct kvm_cpu_context *ctxt, bool full_ctxt) > +__debug_restore_spe_context(struct kvm_cpu_context *ctxt, bool full_ctxt) > { > if (!ctxt->sys_regs[PMSCR_EL1]) > return; > @@ -210,11 +205,14 @@ void __hyp_text __debug_restore_guest_context(struct kvm_vcpu *vcpu) > struct kvm_guest_debug_arch *host_dbg; > struct kvm_guest_debug_arch *guest_dbg; > > + host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context); > + guest_ctxt = &vcpu->arch.ctxt; > + > + __debug_restore_spe_context(guest_ctxt, kvm_arm_spe_v1_ready(vcpu)); > + > if (!(vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY)) > return; > > - host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context); > - guest_ctxt = &vcpu->arch.ctxt; > host_dbg = &vcpu->arch.host_debug_state.regs; > guest_dbg = kern_hyp_va(vcpu->arch.debug_ptr); > > @@ -232,8 +230,7 @@ void __hyp_text __debug_restore_host_context(struct kvm_vcpu *vcpu) > host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context); > guest_ctxt = &vcpu->arch.ctxt; > > - if (!has_vhe()) > - __debug_restore_spe_nvhe(host_ctxt, false); > + __debug_restore_spe_context(host_ctxt, kvm_arm_spe_v1_ready(vcpu)); So you now do an unconditional save/restore on the exit path for VHE as well? Even if the host isn't using the SPE HW? That's not acceptable as, in most cases, only the host /or/ the guest will use SPE. Here, you put a measurable overhead on each exit. If the host is not using SPE, then the restore/save should happen in vcpu_load/vcpu_put. Only if the host is using SPE should you do something in the run loop. Of course, this only applies to VHE and non-VHE must switch eagerly. > > if (!(vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY)) > return; > @@ -249,19 +246,21 @@ void __hyp_text __debug_restore_host_context(struct kvm_vcpu *vcpu) > > void __hyp_text __debug_save_host_context(struct kvm_vcpu *vcpu) > { > - /* > - * Non-VHE: Disable and flush SPE data generation > - * VHE: The vcpu can run, but it can't hide. > - */ > struct kvm_cpu_context *host_ctxt; > > host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context); > - if (!has_vhe()) > - __debug_save_spe_nvhe(host_ctxt, false); > + if (cpuid_feature_extract_unsigned_field(read_sysreg(id_aa64dfr0_el1), > + ID_AA64DFR0_PMSVER_SHIFT)) > + __debug_save_spe_context(host_ctxt, kvm_arm_spe_v1_ready(vcpu)); > } > > void __hyp_text __debug_save_guest_context(struct kvm_vcpu *vcpu) > { > + bool kvm_spe_ready = kvm_arm_spe_v1_ready(vcpu); > + > + /* SPE present on this vCPU? */ > + if (kvm_spe_ready) > + __debug_save_spe_context(&vcpu->arch.ctxt, kvm_spe_ready); > } > > u32 __hyp_text __kvm_get_mdcr_el2(void) > diff --git a/include/kvm/arm_spe.h b/include/kvm/arm_spe.h > index 48d118fdb174..30c40b1bc385 100644 > --- a/include/kvm/arm_spe.h > +++ b/include/kvm/arm_spe.h > @@ -16,4 +16,10 @@ struct kvm_spe { > bool irq_level; > }; > > +#ifdef CONFIG_KVM_ARM_SPE > +#define kvm_arm_spe_v1_ready(v) ((v)->arch.spe.ready) > +#else > +#define kvm_arm_spe_v1_ready(v) (false) > +#endif /* CONFIG_KVM_ARM_SPE */ > + > #endif /* __ASM_ARM_KVM_SPE_H */ Thanks, M. -- Jazz is not dead. It just smells funny...