From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DEA1C3F68F for ; Mon, 13 Jan 2020 18:32:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 235A42080D for ; Mon, 13 Jan 2020 18:32:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alien8.de header.i=@alien8.de header.b="VyN/ooBc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728682AbgAMScj (ORCPT ); Mon, 13 Jan 2020 13:32:39 -0500 Received: from mail.skyhub.de ([5.9.137.197]:55866 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728516AbgAMScj (ORCPT ); Mon, 13 Jan 2020 13:32:39 -0500 Received: from zn.tnic (p200300EC2F05D30049A87F91DFBF49F4.dip0.t-ipconnect.de [IPv6:2003:ec:2f05:d300:49a8:7f91:dfbf:49f4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 63B0C1EC0CD0; Mon, 13 Jan 2020 19:32:36 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1578940356; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=RBW1TCM6YPQlrLEyu7NFV1MDLei+4JpYY2ymbBbRI68=; b=VyN/ooBc5iiyPlTUlqldiBTCt29HwDoTiD6Ey/I6uzPt3mCbCr8TL2UUjlo4TUJ5+pJweE AyoXTnRkd/eVyf9RHRFAZ4Ccl+P9GC0chkkXxYIZELQ+MiVviifPcx7HOFq0CoovzMgFdB G8y+SSry8iOc4sNMcE6Ds+Vtkn0YQNM= Date: Mon, 13 Jan 2020 19:32:28 +0100 From: Borislav Petkov To: Sean Christopherson Cc: Thomas Gleixner , Ingo Molnar , x86@kernel.org, "H. Peter Anvin" , Peter Zijlstra , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , Tony Luck , Tony W Wang-oc , Jacob Pan , Len Brown , Shuah Khan , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-edac@vger.kernel.org, linux-pm@vger.kernel.org, linux-kselftest@vger.kernel.org, Borislav Petkov , Jarkko Sakkinen Subject: Re: [PATCH v5 17/19] KVM: VMX: Use VMX_FEATURE_* flags to define VMCS control bits Message-ID: <20200113183228.GO13310@zn.tnic> References: <20191221044513.21680-1-sean.j.christopherson@intel.com> <20191221044513.21680-18-sean.j.christopherson@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20191221044513.21680-18-sean.j.christopherson@intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, Dec 20, 2019 at 08:45:11PM -0800, Sean Christopherson wrote: > Define the VMCS execution control flags (consumed by KVM) using their > associated VMX_FEATURE_* to provide a strong hint that new VMX features > are expected to be added to VMX_FEATURE and considered for reporting via > /proc/cpuinfo. > > No functional change intended. > > Signed-off-by: Sean Christopherson > --- > arch/x86/include/asm/vmx.h | 105 +++++++++++++++++++------------------ > 1 file changed, 55 insertions(+), 50 deletions(-) > > diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h > index 1835767aa335..9fbba31be825 100644 > --- a/arch/x86/include/asm/vmx.h > +++ b/arch/x86/include/asm/vmx.h > @@ -15,67 +15,70 @@ > #include > #include > #include > +#include > + > +#define VMCS_CONTROL_BIT(x) BIT(VMX_FEATURE_##x & 0x1f) > > /* > * Definitions of Primary Processor-Based VM-Execution Controls. > */ > -#define CPU_BASED_VIRTUAL_INTR_PENDING 0x00000004 > -#define CPU_BASED_USE_TSC_OFFSETING 0x00000008 > -#define CPU_BASED_HLT_EXITING 0x00000080 > -#define CPU_BASED_INVLPG_EXITING 0x00000200 > -#define CPU_BASED_MWAIT_EXITING 0x00000400 > -#define CPU_BASED_RDPMC_EXITING 0x00000800 > -#define CPU_BASED_RDTSC_EXITING 0x00001000 > -#define CPU_BASED_CR3_LOAD_EXITING 0x00008000 > -#define CPU_BASED_CR3_STORE_EXITING 0x00010000 > -#define CPU_BASED_CR8_LOAD_EXITING 0x00080000 > -#define CPU_BASED_CR8_STORE_EXITING 0x00100000 > -#define CPU_BASED_TPR_SHADOW 0x00200000 > -#define CPU_BASED_VIRTUAL_NMI_PENDING 0x00400000 > -#define CPU_BASED_MOV_DR_EXITING 0x00800000 > -#define CPU_BASED_UNCOND_IO_EXITING 0x01000000 > -#define CPU_BASED_USE_IO_BITMAPS 0x02000000 > -#define CPU_BASED_MONITOR_TRAP_FLAG 0x08000000 > -#define CPU_BASED_USE_MSR_BITMAPS 0x10000000 > -#define CPU_BASED_MONITOR_EXITING 0x20000000 > -#define CPU_BASED_PAUSE_EXITING 0x40000000 > -#define CPU_BASED_ACTIVATE_SECONDARY_CONTROLS 0x80000000 > +#define CPU_BASED_VIRTUAL_INTR_PENDING VMCS_CONTROL_BIT(VIRTUAL_INTR_PENDING) > +#define CPU_BASED_USE_TSC_OFFSETING VMCS_CONTROL_BIT(TSC_OFFSETTING) checkpatch correctly complains here: WARNING: 'OFFSETING' may be misspelled - perhaps 'OFFSETTING'? #80: FILE: arch/x86/include/asm/vmx.h:26: +#define CPU_BASED_USE_TSC_OFFSETING VMCS_CONTROL_BIT(TSC_OFFSETTING) and VMX_FEATURE_TSC_OFFSETTING is correct. Should I fix it up to CPU_BASED_USE_TSC_OFFSETTING while applying? -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette