From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <sean.j.christopherson@intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 18/26] KVM: x86: Handle INVPCID CPUID adjustment in vendor code
Date: Wed, 29 Jan 2020 15:46:32 -0800 [thread overview]
Message-ID: <20200129234640.8147-19-sean.j.christopherson@intel.com> (raw)
In-Reply-To: <20200129234640.8147-1-sean.j.christopherson@intel.com>
Move the INVPCID CPUID adjustments into vendor code to eliminate an
instance of the undesirable "unsigned f_* = *_supported ? F(*) : 0"
pattern in the common CPUID handling code. Drop ->invpcid_supported()
since CPUID adjustment was the only user.
No functional change intended.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
arch/x86/include/asm/kvm_host.h | 1 -
arch/x86/kvm/cpuid.c | 3 +--
arch/x86/kvm/svm.c | 7 +------
arch/x86/kvm/vmx/vmx.c | 10 +++-------
4 files changed, 5 insertions(+), 16 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 39ee83f42935..b9c871c03bf5 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1145,7 +1145,6 @@ struct kvm_x86_ops {
u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
int (*get_lpage_level)(void);
bool (*rdtscp_supported)(void);
- bool (*invpcid_supported)(void);
void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index aa03dc665a44..07526b81658e 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -321,7 +321,6 @@ static int __do_cpuid_func_emulated(struct kvm_cpuid_entry2 *entry,
static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
{
- unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;
unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
unsigned f_la57;
@@ -330,7 +329,7 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
/* cpuid 7.0.ebx */
const u32 kvm_cpuid_7_0_ebx_x86_features =
F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
- F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | F(MPX) | F(RDSEED) |
+ F(BMI2) | F(ERMS) | F(INVPCID) | F(RTM) | F(MPX) | F(RDSEED) |
F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt;
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index f64c2c1f9d1f..4ea530ff6a0c 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -6061,6 +6061,7 @@ static void svm_set_supported_cpuid(struct kvm_cpuid_entry2 *entry)
break;
case 0x7:
cpuid_entry_clear(entry, X86_FEATURE_MPX);
+ cpuid_entry_clear(entry, X86_FEATURE_INVPCID);
break;
case 0x80000001:
if (nested)
@@ -6099,11 +6100,6 @@ static bool svm_rdtscp_supported(void)
return boot_cpu_has(X86_FEATURE_RDTSCP);
}
-static bool svm_invpcid_supported(void)
-{
- return false;
-}
-
static bool svm_xsaves_supported(void)
{
return boot_cpu_has(X86_FEATURE_XSAVES);
@@ -7485,7 +7481,6 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
.cpuid_update = svm_cpuid_update,
.rdtscp_supported = svm_rdtscp_supported,
- .invpcid_supported = svm_invpcid_supported,
.xsaves_supported = svm_xsaves_supported,
.umip_emulated = svm_umip_emulated,
.pt_supported = svm_pt_supported,
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index f33bf519690e..14e5031772e5 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1656,11 +1656,6 @@ static bool vmx_rdtscp_supported(void)
return cpu_has_vmx_rdtscp();
}
-static bool vmx_invpcid_supported(void)
-{
- return cpu_has_vmx_invpcid();
-}
-
/*
* Swap MSR entry in host/guest MSR entry array.
*/
@@ -4071,7 +4066,7 @@ static void vmx_compute_secondary_exec_control(struct vcpu_vmx *vmx)
}
}
- if (vmx_invpcid_supported()) {
+ if (cpu_has_vmx_invpcid()) {
/* Exposing INVPCID only when PCID is exposed */
bool invpcid_enabled =
guest_cpuid_has(vcpu, X86_FEATURE_INVPCID) &&
@@ -7144,6 +7139,8 @@ static void vmx_set_supported_cpuid(struct kvm_cpuid_entry2 *entry)
case 0x7:
if (!kvm_mpx_supported())
cpuid_entry_clear(entry, X86_FEATURE_MPX);
+ if (!cpu_has_vmx_invpcid())
+ cpuid_entry_clear(entry, X86_FEATURE_INVPCID);
break;
default:
break;
@@ -7885,7 +7882,6 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init = {
.cpuid_update = vmx_cpuid_update,
.rdtscp_supported = vmx_rdtscp_supported,
- .invpcid_supported = vmx_invpcid_supported,
.set_supported_cpuid = vmx_set_supported_cpuid,
--
2.24.1
next prev parent reply other threads:[~2020-01-29 23:47 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-29 23:46 [PATCH 00/26] KVM: x86: Purge kvm_x86_ops->*_supported() Sean Christopherson
2020-01-29 23:46 ` [PATCH 01/26] KVM: x86: Remove superfluous brackets from case statement Sean Christopherson
2020-02-05 14:29 ` Vitaly Kuznetsov
2020-02-05 14:32 ` Sean Christopherson
2020-01-29 23:46 ` [PATCH 02/26] KVM: x86: Take an unsigned 32-bit int for has_emulated_msr()'s index Sean Christopherson
2020-02-05 14:30 ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 03/26] KVM: x86: Snapshot MSR index in a local variable when processing lists Sean Christopherson
2020-02-05 14:31 ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 04/26] KVM: x86: Add a kvm_x86_ops hook to query virtualized MSR support Sean Christopherson
2020-02-05 14:34 ` Vitaly Kuznetsov
2020-02-05 14:59 ` Sean Christopherson
2020-02-05 15:22 ` Vitaly Kuznetsov
2020-02-05 15:35 ` Sean Christopherson
2020-02-05 16:55 ` Vitaly Kuznetsov
2020-02-05 17:02 ` Sean Christopherson
2020-02-06 12:08 ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 05/26] KVM: x86: Move MSR_TSC_AUX existence checks into vendor code Sean Christopherson
2020-02-05 14:39 ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 06/26] KVM: x86: Move MSR_IA32_BNDCFGS " Sean Christopherson
2020-02-05 14:53 ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 07/26] KVM: VMX: Add helpers to query Intel PT mode Sean Christopherson
2020-01-29 23:46 ` [PATCH 08/26] KVM: x86: Move RTIT (Intel PT) MSR existence checks into vendor code Sean Christopherson
2020-01-29 23:46 ` [PATCH 09/26] KVM: x86: Calculate the supported xcr0 mask at load time Sean Christopherson
2020-01-29 23:46 ` [PATCH 10/26] KVM: x86: Use supported_xcr0 to detect MPX support Sean Christopherson
2020-01-29 23:46 ` [PATCH 11/26] KVM: x86: Make kvm_mpx_supported() an inline function Sean Christopherson
2020-01-29 23:46 ` [PATCH 12/26] KVM: x86: Drop explicit @func param from ->set_supported_cpuid() Sean Christopherson
2020-01-29 23:46 ` [PATCH 13/26] KVM: x86: Use u32 for holding CPUID register value in helpers Sean Christopherson
2020-01-29 23:46 ` [PATCH 14/26] KVM: x86: Introduce cpuid_entry_{get,has}() accessors Sean Christopherson
2020-01-29 23:46 ` [PATCH 15/26] KVM: x86: Introduce cpuid_entry_{change,set,clear}() mutators Sean Christopherson
2020-01-29 23:46 ` [PATCH 16/26] KVM: x86: Add Kconfig-controlled auditing of reverse CPUID lookups Sean Christopherson
2020-01-29 23:46 ` [PATCH 17/26] KVM: x86: Handle MPX CPUID adjustment in vendor code Sean Christopherson
2020-01-29 23:46 ` Sean Christopherson [this message]
2020-01-29 23:46 ` [PATCH 19/26] KVM: x86: Handle UMIP emulation CPUID adjustment in VMX code Sean Christopherson
2020-01-29 23:46 ` [PATCH 20/26] KVM: x86: Handle PKU CPUID adjustment in SVM code Sean Christopherson
2020-01-29 23:46 ` [PATCH 21/26] KVM: x86: Handle RDTSCP CPUID adjustment in VMX code Sean Christopherson
2020-01-29 23:46 ` [PATCH 22/26] KVM: x86: Handle XSAVES " Sean Christopherson
2020-01-29 23:46 ` [PATCH 23/26] KVM: x86: Handle Intel PT CPUID adjustment in vendor code Sean Christopherson
2020-01-29 23:46 ` [PATCH 24/26] KVM: x86: Clear output regs for CPUID 0x14 if PT isn't exposed to guest Sean Christopherson
2020-01-29 23:46 ` [PATCH 25/26] KVM: x86: Handle main Intel PT CPUID leaf in vendor code Sean Christopherson
2020-01-30 0:38 ` Sean Christopherson
2020-01-29 23:46 ` [PATCH 26/26] KVM: VMX: Directly query Intel PT mode when refreshing PMUs Sean Christopherson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200129234640.8147-19-sean.j.christopherson@intel.com \
--to=sean.j.christopherson@intel.com \
--cc=jmattson@google.com \
--cc=joro@8bytes.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=vkuznets@redhat.com \
--cc=wanpengli@tencent.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).