From: Borislav Petkov <bp@alien8.de>
To: Joerg Roedel <joro@8bytes.org>
Cc: x86@kernel.org, hpa@zytor.com, Andy Lutomirski <luto@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Thomas Hellstrom <thellstrom@vmware.com>,
Jiri Slaby <jslaby@suse.cz>,
Dan Williams <dan.j.williams@intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Juergen Gross <jgross@suse.com>,
Kees Cook <keescook@chromium.org>,
David Rientjes <rientjes@google.com>,
Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
Mike Stunes <mstunes@vmware.com>, Joerg Roedel <jroedel@suse.de>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
virtualization@lists.linux-foundation.org
Subject: Re: [PATCH v3 19/75] x86/boot/compressed/64: Add stage1 #VC handler
Date: Sat, 9 May 2020 11:05:48 +0200 [thread overview]
Message-ID: <20200509090548.GA5893@zn.tnic> (raw)
In-Reply-To: <20200428151725.31091-20-joro@8bytes.org>
On Tue, Apr 28, 2020 at 05:16:29PM +0200, Joerg Roedel wrote:
> From: Joerg Roedel <jroedel@suse.de>
>
> Add the first handler for #VC exceptions. At stage 1 there is no GHCB
> yet becaue we might still be on the EFI page table and thus can't map
"... because the kernel might still be running on the EFI page table... "
> memory unencrypted.
>
> The stage 1 handler is limited to the MSR based protocol to talk to
> the hypervisor and can only support CPUID exit-codes, but that is
> enough to get to stage 2.
>
> Signed-off-by: Joerg Roedel <jroedel@suse.de>
> ---
> arch/x86/boot/compressed/Makefile | 1 +
> arch/x86/boot/compressed/idt_64.c | 4 ++
> arch/x86/boot/compressed/idt_handlers_64.S | 4 ++
> arch/x86/boot/compressed/misc.h | 1 +
> arch/x86/boot/compressed/sev-es.c | 45 +++++++++++++++
> arch/x86/include/asm/msr-index.h | 1 +
> arch/x86/include/asm/sev-es.h | 37 ++++++++++++
> arch/x86/include/asm/trap_defs.h | 1 +
> arch/x86/kernel/sev-es-shared.c | 65 ++++++++++++++++++++++
> 9 files changed, 159 insertions(+)
> create mode 100644 arch/x86/boot/compressed/sev-es.c
> create mode 100644 arch/x86/include/asm/sev-es.h
> create mode 100644 arch/x86/kernel/sev-es-shared.c
>
> diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
> index c6909d10a6b9..a7847a1ef63a 100644
> --- a/arch/x86/boot/compressed/Makefile
> +++ b/arch/x86/boot/compressed/Makefile
> @@ -85,6 +85,7 @@ ifdef CONFIG_X86_64
> vmlinux-objs-y += $(obj)/idt_64.o $(obj)/idt_handlers_64.o
> vmlinux-objs-y += $(obj)/mem_encrypt.o
> vmlinux-objs-y += $(obj)/pgtable_64.o
> + vmlinux-objs-$(CONFIG_AMD_MEM_ENCRYPT) += $(obj)/sev-es.o
> endif
>
> vmlinux-objs-$(CONFIG_ACPI) += $(obj)/acpi.o
> diff --git a/arch/x86/boot/compressed/idt_64.c b/arch/x86/boot/compressed/idt_64.c
> index 99cc78062684..f8295d68b3e1 100644
> --- a/arch/x86/boot/compressed/idt_64.c
> +++ b/arch/x86/boot/compressed/idt_64.c
> @@ -31,6 +31,10 @@ void load_stage1_idt(void)
> {
> boot_idt_desc.address = (unsigned long)boot_idt;
>
> +#ifdef CONFIG_AMD_MEM_ENCRYPT
> + set_idt_entry(X86_TRAP_VC, boot_stage1_vc);
> +#endif
if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))
seems to work too and drops the ifdeffery ugliness.
...
> +void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code)
> +{
> + unsigned int fn = lower_bits(regs->ax, 32);
> + unsigned long val;
> +
> + /* Only CPUID is supported via MSR protocol */
> + if (exit_code != SVM_EXIT_CPUID)
> + goto fail;
> +
> + sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EAX));
> + VMGEXIT();
> + val = sev_es_rd_ghcb_msr();
> + if (GHCB_SEV_GHCB_RESP_CODE(val) != GHCB_SEV_CPUID_RESP)
> + goto fail;
> + regs->ax = val >> 32;
> +
> + sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EBX));
> + VMGEXIT();
> + val = sev_es_rd_ghcb_msr();
> + if (GHCB_SEV_GHCB_RESP_CODE(val) != GHCB_SEV_CPUID_RESP)
> + goto fail;
> + regs->bx = val >> 32;
> +
> + sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_ECX));
> + VMGEXIT();
> + val = sev_es_rd_ghcb_msr();
> + if (GHCB_SEV_GHCB_RESP_CODE(val) != GHCB_SEV_CPUID_RESP)
> + goto fail;
> + regs->cx = val >> 32;
> +
> + sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EDX));
> + VMGEXIT();
> + val = sev_es_rd_ghcb_msr();
> + if (GHCB_SEV_GHCB_RESP_CODE(val) != GHCB_SEV_CPUID_RESP)
> + goto fail;
> + regs->dx = val >> 32;
This could use a comment:
/* Skip over the CPUID two-byte opcode */
or so.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2020-05-09 9:05 UTC|newest]
Thread overview: 158+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-28 15:16 [PATCH v3 00/75] x86: SEV-ES Guest Support Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 01/75] KVM: SVM: Add GHCB definitions Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 02/75] KVM: SVM: Add GHCB Accessor functions Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 03/75] KVM: SVM: Use __packed shorthand Joerg Roedel
2020-04-29 10:12 ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 04/75] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 05/75] x86/traps: Move some definitions to <asm/trap_defs.h> Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 06/75] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 07/75] x86/umip: Factor out instruction fetch Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 08/75] x86/umip: Factor out instruction decoding Joerg Roedel
2020-04-30 16:31 ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 09/75] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 10/75] x86/insn: Add insn_rep_prefix() helper Joerg Roedel
2020-05-04 8:46 ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 11/75] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 12/75] x86/boot/compressed/64: Switch to __KERNEL_CS after GDT is loaded Joerg Roedel
2020-05-04 10:41 ` Borislav Petkov
2020-05-04 11:27 ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 13/75] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel
2020-05-04 10:54 ` Borislav Petkov
2020-05-04 11:28 ` Joerg Roedel
2020-06-03 9:06 ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 14/75] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 15/75] x86/boot/compressed/64: Add page-fault handler Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 16/75] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 17/75] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 18/75] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 19/75] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel
2020-05-09 9:05 ` Borislav Petkov [this message]
2020-04-28 15:16 ` [PATCH v3 20/75] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 21/75] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 22/75] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel
2020-05-11 10:02 ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 23/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel
2020-05-11 20:07 ` Borislav Petkov
2020-06-03 10:08 ` Joerg Roedel
2020-05-12 18:11 ` Borislav Petkov
2020-05-12 21:08 ` Joerg Roedel
2020-05-13 8:59 ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 24/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel
2020-05-13 11:13 ` Borislav Petkov
2020-05-13 11:30 ` Joerg Roedel
2020-05-13 11:46 ` Borislav Petkov
2020-06-03 10:40 ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 25/75] x86/sev-es: Add support for handling IOIO exceptions Joerg Roedel
2020-05-13 17:58 ` Borislav Petkov
2020-05-16 7:57 ` Borislav Petkov
2020-06-03 14:19 ` Joerg Roedel
2020-05-20 6:20 ` Sean Christopherson
2020-06-03 14:23 ` Joerg Roedel
2020-06-03 23:07 ` Sean Christopherson
2020-06-04 10:15 ` Joerg Roedel
2020-06-04 14:59 ` Sean Christopherson
2020-06-11 10:03 ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 26/75] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 27/75] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 28/75] x86/idt: Move IDT to data segment Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 29/75] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 30/75] x86/idt: Move two function from k/idt.c to i/a/desc.h Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 31/75] x86/head/64: Install boot GDT Joerg Roedel
2020-05-18 8:23 ` Borislav Petkov
2020-06-04 11:48 ` Joerg Roedel
2020-06-04 14:13 ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 32/75] x86/head/64: Reload GDT after switch to virtual addresses Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 33/75] x86/head/64: Load segment registers earlier Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 34/75] x86/head/64: Switch to initial stack earlier Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 35/75] x86/head/64: Build k/head64.c with -fno-stack-protector Joerg Roedel
2020-05-19 9:15 ` Borislav Petkov
2020-06-03 15:21 ` Joerg Roedel
2020-05-19 13:58 ` Brian Gerst
2020-06-03 15:18 ` Joerg Roedel
2020-06-03 17:14 ` Brian Gerst
2020-04-28 15:16 ` [PATCH v3 36/75] x86/head/64: Load IDT earlier Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 37/75] x86/head/64: Move early exception dispatch to C code Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 38/75] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel
2020-05-20 8:39 ` Borislav Petkov
2020-06-03 15:24 ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 39/75] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 40/75] x86/sev-es: Compile early handler code into kernel image Joerg Roedel
2020-05-20 9:14 ` Borislav Petkov
2020-06-04 11:54 ` Joerg Roedel
2020-06-04 15:19 ` Borislav Petkov
2020-06-11 10:05 ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 41/75] x86/sev-es: Setup early #VC handler Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 42/75] x86/sev-es: Setup GHCB based boot " Joerg Roedel
2020-05-20 19:22 ` Borislav Petkov
2020-06-04 12:07 ` Joerg Roedel
2020-06-04 15:30 ` Borislav Petkov
2020-06-11 10:14 ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 43/75] x86/sev-es: Setup per-cpu GHCBs for the runtime handler Joerg Roedel
2020-05-22 8:33 ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 44/75] x86/sev-es: Allocate and Map IST stacks for #VC handler Joerg Roedel
2020-05-22 9:49 ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 45/75] x86/dumpstack/64: Handle #VC exception stacks Joerg Roedel
2020-05-22 13:06 ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 46/75] x86/sev-es: Shift #VC IST Stack in nmi_enter()/nmi_exit() Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 47/75] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel
2020-05-23 7:59 ` Borislav Petkov
2020-06-11 11:48 ` Joerg Roedel
2020-06-11 17:38 ` Sean Christopherson
2020-06-11 18:16 ` Joerg Roedel
2020-06-12 13:13 ` Borislav Petkov
2020-06-11 11:53 ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 48/75] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 49/75] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel
2020-05-23 9:23 ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 50/75] x86/sev-es: Do not crash on #VC exceptions " Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 51/75] x86/sev-es: Handle MMIO events Joerg Roedel
2020-05-20 6:32 ` Sean Christopherson
2020-06-11 12:40 ` Joerg Roedel
2020-05-25 8:02 ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 52/75] x86/sev-es: Handle MMIO String Instructions Joerg Roedel
2020-05-25 9:47 ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 53/75] x86/sev-es: Handle MSR events Joerg Roedel
2020-05-25 9:53 ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 54/75] x86/sev-es: Handle DR7 read/write events Joerg Roedel
2020-05-25 10:59 ` Borislav Petkov
2020-06-11 13:06 ` Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 55/75] x86/sev-es: Handle WBINVD Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 56/75] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 57/75] x86/sev-es: Handle RDPMC Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 58/75] x86/sev-es: Handle INVD Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 59/75] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel
2020-05-20 6:38 ` Sean Christopherson
2020-06-11 13:10 ` Joerg Roedel
2020-06-11 17:13 ` Sean Christopherson
2020-06-11 19:33 ` Tom Lendacky
2020-06-12 9:25 ` Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 60/75] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 61/75] x86/sev-es: Handle VMMCALL Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 62/75] x86/sev-es: Handle #AC Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 63/75] x86/sev-es: Handle #DB Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 64/75] x86/sev-es: Cache CPUID results for improved performance Joerg Roedel
2020-05-06 18:08 ` Mike Stunes
2020-05-06 23:02 ` Tom Lendacky
2020-05-20 5:16 ` Sean Christopherson
2020-05-26 9:19 ` Borislav Petkov
2020-05-27 17:49 ` Tom Lendacky
2020-05-27 15:34 ` Tom Lendacky
2020-06-12 9:12 ` Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 65/75] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 66/75] x86/kvm: Add KVM " Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 67/75] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel
2020-05-28 12:38 ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 68/75] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 69/75] x86/realmode: Setup AP jump table Joerg Roedel
2020-05-29 9:02 ` Borislav Petkov
2020-05-29 16:21 ` Tom Lendacky
2020-04-28 15:17 ` [PATCH v3 70/75] x86/head/64: Setup TSS early for secondary CPUs Joerg Roedel
2020-06-02 15:46 ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 71/75] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 72/75] x86/head/64: Rename start_cpu0 Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 73/75] x86/sev-es: Support CPU offline/online Joerg Roedel
2020-06-03 9:54 ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 74/75] x86/sev-es: Handle NMI State Joerg Roedel
2020-06-03 9:59 ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 75/75] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel
2020-06-03 13:52 ` Borislav Petkov
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