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From: Joerg Roedel <joro@8bytes.org>
To: x86@kernel.org
Cc: Joerg Roedel <joro@8bytes.org>, Joerg Roedel <jroedel@suse.de>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	hpa@zytor.com, Andy Lutomirski <luto@kernel.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Jiri Slaby <jslaby@suse.cz>,
	Dan Williams <dan.j.williams@intel.com>,
	Juergen Gross <jgross@suse.com>,
	Kees Cook <keescook@chromium.org>,
	David Rientjes <rientjes@google.com>,
	Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Mike Stunes <mstunes@vmware.com>,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	Martin Radev <martin.b.radev@gmail.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	virtualization@lists.linux-foundation.org
Subject: [PATCH v5 43/75] x86/sev-es: Setup per-cpu GHCBs for the runtime handler
Date: Fri, 24 Jul 2020 18:03:04 +0200	[thread overview]
Message-ID: <20200724160336.5435-44-joro@8bytes.org> (raw)
In-Reply-To: <20200724160336.5435-1-joro@8bytes.org>

From: Tom Lendacky <thomas.lendacky@amd.com>

The runtime handler needs a GHCB per CPU. Set them up and map them
unencrypted.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
---
 arch/x86/include/asm/mem_encrypt.h |  2 ++
 arch/x86/kernel/sev-es.c           | 56 +++++++++++++++++++++++++++++-
 arch/x86/kernel/traps.c            |  3 ++
 3 files changed, 60 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h
index 4e72b73a9cb5..c9f5df0a1c10 100644
--- a/arch/x86/include/asm/mem_encrypt.h
+++ b/arch/x86/include/asm/mem_encrypt.h
@@ -49,6 +49,7 @@ void __init mem_encrypt_free_decrypted_mem(void);
 /* Architecture __weak replacement functions */
 void __init mem_encrypt_init(void);
 
+void __init sev_es_init_vc_handling(void);
 bool sme_active(void);
 bool sev_active(void);
 bool sev_es_active(void);
@@ -72,6 +73,7 @@ static inline void __init sme_early_init(void) { }
 static inline void __init sme_encrypt_kernel(struct boot_params *bp) { }
 static inline void __init sme_enable(struct boot_params *bp) { }
 
+static inline void sev_es_init_vc_handling(void) { }
 static inline bool sme_active(void) { return false; }
 static inline bool sev_active(void) { return false; }
 static inline bool sev_es_active(void) { return false; }
diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c
index bb3e702a71eb..734afaee378d 100644
--- a/arch/x86/kernel/sev-es.c
+++ b/arch/x86/kernel/sev-es.c
@@ -8,8 +8,13 @@
  */
 
 #include <linux/sched/debug.h>	/* For show_regs() */
-#include <linux/kernel.h>
+#include <linux/percpu-defs.h>
+#include <linux/mem_encrypt.h>
 #include <linux/printk.h>
+#include <linux/mm_types.h>
+#include <linux/set_memory.h>
+#include <linux/memblock.h>
+#include <linux/kernel.h>
 #include <linux/mm.h>
 
 #include <asm/sev-es.h>
@@ -29,6 +34,13 @@ static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE);
  */
 static struct ghcb __initdata *boot_ghcb;
 
+/* #VC handler runtime per-cpu data */
+struct sev_es_runtime_data {
+	struct ghcb ghcb_page;
+};
+
+static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data);
+
 /* Needed in vc_early_forward_exception */
 void do_early_exception(struct pt_regs *regs, int trapnr);
 
@@ -198,6 +210,48 @@ static bool __init sev_es_setup_ghcb(void)
 	return true;
 }
 
+static void __init sev_es_alloc_runtime_data(int cpu)
+{
+	struct sev_es_runtime_data *data;
+
+	data = memblock_alloc(sizeof(*data), PAGE_SIZE);
+	if (!data)
+		panic("Can't allocate SEV-ES runtime data");
+
+	per_cpu(runtime_data, cpu) = data;
+}
+
+static void __init sev_es_init_ghcb(int cpu)
+{
+	struct sev_es_runtime_data *data;
+	int err;
+
+	data = per_cpu(runtime_data, cpu);
+
+	err = early_set_memory_decrypted((unsigned long)&data->ghcb_page,
+					 sizeof(data->ghcb_page));
+	if (err)
+		panic("Can not map GHCBs unencrypted");
+
+	memset(&data->ghcb_page, 0, sizeof(data->ghcb_page));
+}
+
+void __init sev_es_init_vc_handling(void)
+{
+	int cpu;
+
+	BUILD_BUG_ON((offsetof(struct sev_es_runtime_data, ghcb_page) % PAGE_SIZE) != 0);
+
+	if (!sev_es_active())
+		return;
+
+	/* Initialize per-cpu GHCB pages */
+	for_each_possible_cpu(cpu) {
+		sev_es_alloc_runtime_data(cpu);
+		sev_es_init_ghcb(cpu);
+	}
+}
+
 static void __init vc_early_forward_exception(struct es_em_ctxt *ctxt)
 {
 	int trapnr = ctxt->fi.vector;
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 8493f55e1167..bf850127c442 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -1078,6 +1078,9 @@ void __init trap_init(void)
 	/* Init cpu_entry_area before IST entries are set up */
 	setup_cpu_entry_areas();
 
+	/* Init GHCB memory pages when running as an SEV-ES guest */
+	sev_es_init_vc_handling();
+
 	idt_setup_traps();
 
 	/*
-- 
2.27.0


  parent reply	other threads:[~2020-07-24 16:08 UTC|newest]

Thread overview: 97+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-24 16:02 [PATCH v5 00/75] x86: SEV-ES Guest Support Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 01/75] KVM: SVM: Add GHCB definitions Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 02/75] KVM: SVM: Add GHCB Accessor functions Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 03/75] KVM: SVM: Use __packed shorthand Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 04/75] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 05/75] x86/traps: Move pf error codes to <asm/trap_pf.h> Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 06/75] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 07/75] x86/umip: Factor out instruction fetch Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 08/75] x86/umip: Factor out instruction decoding Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 09/75] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 10/75] x86/insn: Add insn_has_rep_prefix() helper Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 11/75] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel
2020-07-24 17:43   ` Kees Cook
2020-07-24 17:58   ` Arvind Sankar
2020-07-24 16:02 ` [PATCH v5 12/75] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 13/75] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 14/75] x86/boot/compressed/64: Add page-fault handler Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 15/75] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 16/75] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 17/75] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 18/75] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 19/75] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 20/75] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 21/75] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 22/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 23/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 24/75] x86/sev-es: Add support for handling IOIO exceptions Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 25/75] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 26/75] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 27/75] x86/idt: Move IDT to data segment Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 28/75] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 29/75] x86/head/64: Install startup GDT Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 30/75] x86/head/64: Setup MSR_GS_BASE before calling into C code Joerg Roedel
2020-07-24 17:42   ` Kees Cook
2020-07-24 16:02 ` [PATCH v5 31/75] x86/head/64: Load GDT after switch to virtual addresses Joerg Roedel
2020-07-24 17:40   ` Kees Cook
2020-07-24 16:02 ` [PATCH v5 32/75] x86/head/64: Load segment registers earlier Joerg Roedel
2020-07-24 17:42   ` Kees Cook
2020-07-24 16:02 ` [PATCH v5 33/75] x86/head/64: Switch to initial stack earlier Joerg Roedel
2020-07-24 17:43   ` Kees Cook
2020-07-24 16:02 ` [PATCH v5 34/75] x86/head/64: Make fixup_pointer() static inline Joerg Roedel
2020-07-24 17:52   ` Kees Cook
2020-07-24 16:02 ` [PATCH v5 35/75] x86/head/64: Load IDT earlier Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 36/75] x86/head/64: Move early exception dispatch to C code Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 37/75] x86/head/64: Set CR4.FSGSBASE early Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 38/75] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel
2020-07-24 17:54   ` Kees Cook
2020-07-24 16:03 ` [PATCH v5 39/75] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel
2020-07-24 17:54   ` Kees Cook
2020-07-24 16:03 ` [PATCH v5 40/75] x86/sev-es: Compile early handler code into kernel image Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 41/75] x86/sev-es: Setup early #VC handler Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 42/75] x86/sev-es: Setup GHCB based boot " Joerg Roedel
2020-07-24 16:03 ` Joerg Roedel [this message]
2020-07-24 16:03 ` [PATCH v5 44/75] x86/sev-es: Allocate and Map IST stack for " Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 45/75] x86/sev-es: Adjust #VC IST Stack on entering NMI handler Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 46/75] x86/dumpstack/64: Add noinstr version of get_stack_info() Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 47/75] x86/entry/64: Add entry code for #VC handler Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 48/75] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 49/75] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 50/75] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 51/75] x86/sev-es: Handle MMIO events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 52/75] x86/sev-es: Handle MMIO String Instructions Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 53/75] x86/sev-es: Handle MSR events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 54/75] x86/sev-es: Handle DR7 read/write events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 55/75] x86/sev-es: Handle WBINVD Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 56/75] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 57/75] x86/sev-es: Handle RDPMC Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 58/75] x86/sev-es: Handle INVD Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 59/75] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 60/75] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 61/75] x86/sev-es: Handle VMMCALL Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 62/75] x86/sev-es: Handle #AC Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 63/75] x86/sev-es: Handle #DB Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 64/75] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 65/75] x86/kvm: Add KVM " Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 66/75] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 67/75] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 68/75] x86/realmode: Setup AP jump table Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 69/75] x86/smpboot: Setup TSS for starting AP Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 70/75] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel
2020-07-24 17:57   ` Kees Cook
2020-07-24 16:03 ` [PATCH v5 71/75] x86/head/64: Rename start_cpu0 Joerg Roedel
2020-07-24 17:56   ` Kees Cook
2020-07-24 16:03 ` [PATCH v5 72/75] x86/sev-es: Support CPU offline/online Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 73/75] x86/sev-es: Handle NMI State Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 74/75] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 75/75] x86/sev-es: Check required CPU features for SEV-ES Joerg Roedel
2020-07-24 17:55   ` Kees Cook
2020-07-30  1:27 ` [PATCH v5 00/75] x86: SEV-ES Guest Support Mike Stunes
2020-07-30 12:26   ` Joerg Roedel
2020-07-30 23:23     ` Mike Stunes
2020-08-18 15:07       ` Joerg Roedel
2020-08-20  0:58         ` Mike Stunes
2020-08-20 12:10           ` Joerg Roedel
2020-08-21  8:05           ` Joerg Roedel
2020-08-21 17:42             ` Mike Stunes
2020-08-22 16:30               ` Joerg Roedel

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