From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEBC9C433E0 for ; Fri, 31 Jul 2020 07:43:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D94D92250E for ; Fri, 31 Jul 2020 07:43:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731761AbgGaHnk (ORCPT ); Fri, 31 Jul 2020 03:43:40 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:34340 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1731747AbgGaHni (ORCPT ); Fri, 31 Jul 2020 03:43:38 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id B4BA015B9C2EA815E558; Fri, 31 Jul 2020 15:43:36 +0800 (CST) Received: from DESKTOP-FPN2511.china.huawei.com (10.174.187.42) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Fri, 31 Jul 2020 15:43:29 +0800 From: Jingyi Wang To: , , CC: , , , , , Subject: [kvm-unit-tests PATCH v3 10/10] arm64: microbench: Add timer_post() to get actual PPI latency Date: Fri, 31 Jul 2020 15:42:44 +0800 Message-ID: <20200731074244.20432-11-wangjingyi11@huawei.com> X-Mailer: git-send-email 2.14.1.windows.1 In-Reply-To: <20200731074244.20432-1-wangjingyi11@huawei.com> References: <20200731074244.20432-1-wangjingyi11@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.174.187.42] X-CFilter-Loop: Reflected Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org For we get the time duration of (10msec timer + injection latency) in timer_exec(), we substract the value of 10msec in timer_post() to get the actual latency. Signed-off-by: Jingyi Wang --- arm/micro-bench.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arm/micro-bench.c b/arm/micro-bench.c index 4680ba4..315fc7c 100644 --- a/arm/micro-bench.c +++ b/arm/micro-bench.c @@ -254,6 +254,18 @@ static void timer_exec(void) assert_msg(irq_received, "failed to receive PPI in time, but received %d successfully\n", received); } +static void timer_post(uint64_t total_ticks, uint64_t ntimes, struct ns_time *total_ns) +{ + /* + * We use a 10msec timer to test the latency of PPI, + * so we substract the ticks of 10msec to get the + * actual latency + */ + + total_ticks -= ntimes * (cntfrq / 100); + ticks_to_ns_time(total_ticks, total_ns); +} + static void hvc_exec(void) { asm volatile("mov w0, #0x4b000000; hvc #0" ::: "w0"); @@ -302,7 +314,7 @@ static struct exit_test tests[] = { {"ipi", ipi_prep, ipi_exec, NULL, 65536, true}, {"ipi_hw", ipi_hw_prep, ipi_exec, NULL, 65536, true}, {"lpi", lpi_prep, lpi_exec, NULL, 65536, true}, - {"timer_10ms", timer_prep, timer_exec, NULL, 256, true}, + {"timer_10ms", timer_prep, timer_exec, timer_post, 256, true}, }; #define PS_PER_SEC (1000 * 1000 * 1000 * 1000UL) -- 2.19.1