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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Marc Zyngier <maz@kernel.org>
Cc: <kvm@vger.kernel.org>, <kvmarm@lists.cs.columbia.edu>,
	<linux-arm-kernel@lists.infradead.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Christoffer Dall <Christoffer.Dall@arm.com>,
	James Morse <james.morse@arm.com>, <kernel-team@android.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: Re: [PATCH 03/23] irqchip: Add Reduced Virtual Interrupt Distributor support
Date: Fri, 4 Sep 2020 14:56:16 +0100	[thread overview]
Message-ID: <20200904145616.00007950@Huawei.com> (raw)
In-Reply-To: <20200903152610.1078827-4-maz@kernel.org>

On Thu,  3 Sep 2020 16:25:50 +0100
Marc Zyngier <maz@kernel.org> wrote:

> Signed-off-by: Marc Zyngier <maz@kernel.org>

Hi Marc,

Again, only trivial stuff in here from me.

Jonathan

> ---
>  drivers/irqchip/Kconfig          |   6 +
>  drivers/irqchip/Makefile         |   1 +
>  drivers/irqchip/irq-rvid.c       | 259 +++++++++++++++++++++++++++++++
>  include/linux/irqchip/irq-rvic.h |  19 +++
>  4 files changed, 285 insertions(+)
>  create mode 100644 drivers/irqchip/irq-rvid.c
> 
...

> +static int rvid_irq_set_affinity(struct irq_data *data,
> +				 const struct cpumask *mask_val,
> +				 bool force)
> +{
> +	unsigned int old_cpu, cpu;
> +	bool masked, pending;
> +	int err = 0, ret;

Looks like err is set in all paths (might change in later patches of
course!)

> +	u64 mpidr;
> +
> +	if (force)
> +		cpu = cpumask_first(mask_val);
> +	else
> +		cpu = cpumask_any_and(mask_val, cpu_online_mask);
> +
> +	if (cpu >= nr_cpu_ids)
> +		return -EINVAL;
> +
> +	mpidr = cpu_logical_map(cpu) & MPIDR_HWID_BITMASK;
> +	old_cpu = cpumask_first(data->common->effective_affinity);
> +	if (cpu == old_cpu)
> +		return 0;
> +
> +	/* Mask on source */
> +	masked = irqd_irq_masked(data);
> +	if (!masked)
> +		irq_chip_mask_parent(data);
> +
> +	/* Switch to target */
> +	irq_data_update_effective_affinity(data, cpumask_of(cpu));
> +
> +	/* Mask on target */
> +	irq_chip_mask_parent(data);
> +
> +	/* Map the input signal to the new target */
> +	ret = rvid_map(data->hwirq, mpidr, data->parent_data->hwirq);
> +	if (ret != RVID_STATUS_SUCCESS) {
> +		err = -ENXIO;
> +		goto unmask;
> +	}
> +
> +	/* Back to the source */
> +	irq_data_update_effective_affinity(data, cpumask_of(old_cpu));
> +
> +	/* Sample pending state and clear it if necessary */
> +	err = irq_chip_get_parent_state(data, IRQCHIP_STATE_PENDING, &pending);
> +	if (err)
> +		goto unmask;
> +	if (pending)
> +		irq_chip_set_parent_state(data, IRQCHIP_STATE_PENDING, false);
> +
> +	/*
> +	 * To the target again (for good this time), propagating the
> +	 * pending bit if required.
> +	 */
> +	irq_data_update_effective_affinity(data, cpumask_of(cpu));
> +	if (pending)
> +		irq_chip_set_parent_state(data, IRQCHIP_STATE_PENDING, true);
> +unmask:
> +	/* Propagate the masking state */
> +	if (!masked)
> +		irq_chip_unmask_parent(data);
> +
> +	return err;
> +}
> +

...

> +static int rvid_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
> +				 unsigned int nr_irqs, void *arg)
> +{
> +	struct irq_fwspec *fwspec = arg;
> +	unsigned int type = IRQ_TYPE_NONE;
> +	irq_hw_number_t hwirq;
> +	int i, ret;
> +
> +	ret = irq_domain_translate_onecell(domain, fwspec, &hwirq, &type);
> +	if (ret)
> +		return ret;
> +
> +	for (i = 0; i < nr_irqs; i++) {
> +		unsigned int intid = hwirq + i;
> +		unsigned int irq = virq + i;
> +
> +		/* Get the rVIC to allocate any untrusted intid */
> +		ret = irq_domain_alloc_irqs_parent(domain, irq, 1, NULL);
> +		if (WARN_ON(ret))
> +			return ret;
> +
> +		irq_domain_set_hwirq_and_chip(domain, irq, intid,
> +					      &rvid_chip, &rvid);
> +		irqd_set_affinity_on_activate(irq_get_irq_data(irq));
> +	}
> +
> +	return 0;
> +}
> +
> +static void rvid_irq_domain_free(struct irq_domain *domain, unsigned int virq,
> +				 unsigned int nr_irqs)
> +{
> +	int i;
> +
> +	irq_domain_free_irqs_parent(domain, virq, nr_irqs);
> +
> +	for (i = 0; i < nr_irqs; i++) {
> +		struct irq_data *d;

Trivial but for ease of comparison with _alloc, perhaps add

                unsigned int int = virq + i;
> +
> +		d = irq_domain_get_irq_data(domain, virq + i);
> +		irq_set_handler(virq + i, NULL);
> +		irq_domain_reset_irq_data(d);
> +	}
> +}
> +



  reply	other threads:[~2020-09-04 13:58 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-03 15:25 [PATCH 00/23] KVM: arm64: rVIC/rVID PV interrupt controller Marc Zyngier
2020-09-03 15:25 ` [PATCH 01/23] irqchip: Add Reduced Virtual Interrupt Controller driver Marc Zyngier
2020-09-03 15:25 ` [PATCH 02/23] irqchip/rvic: Add support for untrusted interrupt allocation Marc Zyngier
2020-09-04 13:40   ` Jonathan Cameron
2020-09-03 15:25 ` [PATCH 03/23] irqchip: Add Reduced Virtual Interrupt Distributor support Marc Zyngier
2020-09-04 13:56   ` Jonathan Cameron [this message]
2020-09-03 15:25 ` [PATCH 04/23] irqchip/rvid: Add PCI MSI support Marc Zyngier
2020-09-04 14:15   ` Jonathan Cameron
2020-09-05 13:08     ` Marc Zyngier
2020-09-03 15:25 ` [PATCH 05/23] KVM: arm64: Move GIC model out of the distributor Marc Zyngier
2020-09-04 14:37   ` Jonathan Cameron
2020-09-03 15:25 ` [PATCH 06/23] KVM: arm64: vgic-v3: Move early init to kvm_vgic_create() Marc Zyngier
2020-09-03 15:25 ` [PATCH 07/23] KVM: arm64: Add irqchip callback structure to kvm_arch Marc Zyngier
2020-09-03 15:25 ` [PATCH 08/23] KVM: arm64: Move kvm_vgic_destroy to kvm_irqchip_flow Marc Zyngier
2020-09-03 15:25 ` [PATCH 09/23] KVM: arm64: Move kvm_vgic_vcpu_init() to irqchip_flow Marc Zyngier
2020-09-03 15:25 ` [PATCH 10/23] KVM: arm64: Move kvm_vgic_vcpu_[un]blocking() " Marc Zyngier
2020-09-03 15:25 ` [PATCH 11/23] KVM: arm64: Move kvm_vgic_vcpu_load/put() " Marc Zyngier
2020-09-03 15:25 ` [PATCH 12/23] KVM: arm64: Move kvm_vgic_vcpu_pending_irq() " Marc Zyngier
2020-09-04 14:57   ` Jonathan Cameron
2020-09-03 15:26 ` [PATCH 13/23] KVM: arm64: Move vgic resource mapping on first run " Marc Zyngier
2020-09-03 15:26 ` [PATCH 14/23] KVM: arm64: Move kvm_vgic_vcpu_{sync,flush}_hwstate() " Marc Zyngier
2020-09-03 15:26 ` [PATCH 15/23] KVM: arm64: nVHE: Only save/restore GICv3 state if modeling a GIC Marc Zyngier
2020-09-03 15:26 ` [PATCH 16/23] KVM: arm64: Move interrupt injection to irqchip_flow Marc Zyngier
2020-09-03 15:26 ` [PATCH 17/23] KVM: arm64: Move mapping of HW interrupts into irqchip_flow Marc Zyngier
2020-09-03 15:26 ` [PATCH 18/23] KVM: arm64: Move set_owner " Marc Zyngier
2020-09-03 15:26 ` [PATCH 19/23] KVM: arm64: Turn vgic_initialized into irqchip_finalized Marc Zyngier
2020-09-03 15:26 ` [PATCH 20/23] KVM: arm64: Move irqfd routing to irqchip_flow Marc Zyngier
2020-09-03 15:26 ` [PATCH 21/23] KVM: arm64: Tighten msis_require_devid reporting Marc Zyngier
2020-09-03 15:26 ` [PATCH 22/23] KVM: arm64: Add a rVIC/rVID in-kernel implementation Marc Zyngier
2020-09-04 16:00   ` Jonathan Cameron
2020-09-05 13:16     ` Marc Zyngier
2020-09-29 15:13   ` Lorenzo Pieralisi
2020-09-29 15:27     ` Marc Zyngier
2020-09-29 16:09       ` Lorenzo Pieralisi
2020-09-03 15:26 ` [PATCH 23/23] KVM: arm64: Add debugfs files for the rVIC/rVID implementation Marc Zyngier

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