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From: Will Deacon <will@kernel.org>
To: Marc Zyngier <maz@kernel.org>
Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org, kernel-team@android.com
Subject: Re: [PATCH v2 0/2] KVM: arm64: Fix handling of S1PTW
Date: Fri, 18 Sep 2020 14:37:55 +0100	[thread overview]
Message-ID: <20200918133755.GD31232@willie-the-truck> (raw)
In-Reply-To: <20200915104218.1284701-1-maz@kernel.org>

On Tue, Sep 15, 2020 at 11:42:16AM +0100, Marc Zyngier wrote:
> I recently managed to trigger an interesting failure mode, where a
> guest would be stuck on an instruction abort due to a permission
> fault. Interestingly enough, this IABT had S1PTW set in the ESR,
> indicating that it was trying to *write* to the PT. We fix it by
> adding the execute permission (it's an IABT, after all...), and going
> nowhere fast.
> 
> Note that it can only happen on a system that can perform automatic
> updates of the page table flags.
> 
> This small series fixes the issue by revamping the S1PTW handling in
> the context of execution faults. The first patch fixes the bug, and is
> definitely a stable candidate. The second patch is merely a cleanup,
> which can wait.
> 
> Tested on an A55-based board.
> 
> * From v1:
>   - Rename kvm_vcpu_dabt_iss1tw() to kvm_vcpu_abt_iss1tw()
>   - Don't overload kvm_vcpu_trap_is_iabt()
>   - Introduce kvm_vcpu_trap_is_exec_fault()

For both patches:

Reviewed-by: Will Deacon <will@kernel.org>

Cheers,

Will

      parent reply	other threads:[~2020-09-18 13:38 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-15 10:42 [PATCH v2 0/2] KVM: arm64: Fix handling of S1PTW Marc Zyngier
2020-09-15 10:42 ` [PATCH v2 1/2] KVM: arm64: Assume write fault on S1PTW permission fault on instruction fetch Marc Zyngier
2020-09-21 12:54   ` Sasha Levin
2020-09-15 10:42 ` [PATCH v2 2/2] KVM: arm64: Remove S1PTW check from kvm_vcpu_dabt_iswrite() Marc Zyngier
2020-09-18 13:37 ` Will Deacon [this message]

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