From: David Woodhouse <dwmw2@infradead.org> To: x86@kernel.org Cc: kvm <kvm@vger.kernel.org>, iommu@lists.linux-foundation.org, joro@8bytes.org, Thomas Gleixner <tglx@linutronix.de>, Paolo Bonzini <pbonzini@redhat.com>, linux-kernel <linux-kernel@vger.kernel.org>, linux-hyperv@vger.kernel.org, maz@misterjones.org, Dexuan Cui <decui@microsoft.com> Subject: [PATCH v3 10/35] x86/hpet: Move MSI support into hpet.c Date: Sat, 24 Oct 2020 22:35:10 +0100 Message-ID: <20201024213535.443185-11-dwmw2@infradead.org> (raw) In-Reply-To: <20201024213535.443185-1-dwmw2@infradead.org> From: David Woodhouse <dwmw@amazon.co.uk> This isn't really dependent on PCI MSI; it's just generic MSI which is now supported by the generic x86_vector_domain. Move the HPET MSI support back into hpet.c with the rest of the HPET support. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- arch/x86/include/asm/hpet.h | 11 ---- arch/x86/kernel/apic/msi.c | 111 --------------------------------- arch/x86/kernel/hpet.c | 118 ++++++++++++++++++++++++++++++++++-- 3 files changed, 112 insertions(+), 128 deletions(-) diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h index 6352dee37cda..ab9f3dd87c80 100644 --- a/arch/x86/include/asm/hpet.h +++ b/arch/x86/include/asm/hpet.h @@ -74,17 +74,6 @@ extern void hpet_disable(void); extern unsigned int hpet_readl(unsigned int a); extern void force_hpet_resume(void); -struct irq_data; -struct hpet_channel; -struct irq_domain; - -extern void hpet_msi_unmask(struct irq_data *data); -extern void hpet_msi_mask(struct irq_data *data); -extern void hpet_msi_write(struct hpet_channel *hc, struct msi_msg *msg); -extern struct irq_domain *hpet_create_irq_domain(int hpet_id); -extern int hpet_assign_irq(struct irq_domain *domain, - struct hpet_channel *hc, int dev_num); - #ifdef CONFIG_HPET_EMULATE_RTC #include <linux/interrupt.h> diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c index 4eda617eda1e..44ebe25e7703 100644 --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -340,114 +340,3 @@ void dmar_free_hwirq(int irq) irq_domain_free_irqs(irq, 1); } #endif - -/* - * MSI message composition - */ -#ifdef CONFIG_HPET_TIMER -static inline int hpet_dev_id(struct irq_domain *domain) -{ - struct msi_domain_info *info = msi_get_domain_info(domain); - - return (int)(long)info->data; -} - -static void hpet_msi_write_msg(struct irq_data *data, struct msi_msg *msg) -{ - hpet_msi_write(irq_data_get_irq_handler_data(data), msg); -} - -static struct irq_chip hpet_msi_controller __ro_after_init = { - .name = "HPET-MSI", - .irq_unmask = hpet_msi_unmask, - .irq_mask = hpet_msi_mask, - .irq_ack = irq_chip_ack_parent, - .irq_set_affinity = msi_domain_set_affinity, - .irq_retrigger = irq_chip_retrigger_hierarchy, - .irq_write_msi_msg = hpet_msi_write_msg, - .flags = IRQCHIP_SKIP_SET_WAKE, -}; - -static int hpet_msi_init(struct irq_domain *domain, - struct msi_domain_info *info, unsigned int virq, - irq_hw_number_t hwirq, msi_alloc_info_t *arg) -{ - irq_set_status_flags(virq, IRQ_MOVE_PCNTXT); - irq_domain_set_info(domain, virq, arg->hwirq, info->chip, NULL, - handle_edge_irq, arg->data, "edge"); - - return 0; -} - -static void hpet_msi_free(struct irq_domain *domain, - struct msi_domain_info *info, unsigned int virq) -{ - irq_clear_status_flags(virq, IRQ_MOVE_PCNTXT); -} - -static struct msi_domain_ops hpet_msi_domain_ops = { - .msi_init = hpet_msi_init, - .msi_free = hpet_msi_free, -}; - -static struct msi_domain_info hpet_msi_domain_info = { - .ops = &hpet_msi_domain_ops, - .chip = &hpet_msi_controller, - .flags = MSI_FLAG_USE_DEF_DOM_OPS, -}; - -struct irq_domain *hpet_create_irq_domain(int hpet_id) -{ - struct msi_domain_info *domain_info; - struct irq_domain *parent, *d; - struct irq_alloc_info info; - struct fwnode_handle *fn; - - if (x86_vector_domain == NULL) - return NULL; - - domain_info = kzalloc(sizeof(*domain_info), GFP_KERNEL); - if (!domain_info) - return NULL; - - *domain_info = hpet_msi_domain_info; - domain_info->data = (void *)(long)hpet_id; - - init_irq_alloc_info(&info, NULL); - info.type = X86_IRQ_ALLOC_TYPE_HPET_GET_PARENT; - info.devid = hpet_id; - parent = irq_remapping_get_irq_domain(&info); - if (parent == NULL) - parent = x86_vector_domain; - else - hpet_msi_controller.name = "IR-HPET-MSI"; - - fn = irq_domain_alloc_named_id_fwnode(hpet_msi_controller.name, - hpet_id); - if (!fn) { - kfree(domain_info); - return NULL; - } - - d = msi_create_irq_domain(fn, domain_info, parent); - if (!d) { - irq_domain_free_fwnode(fn); - kfree(domain_info); - } - return d; -} - -int hpet_assign_irq(struct irq_domain *domain, struct hpet_channel *hc, - int dev_num) -{ - struct irq_alloc_info info; - - init_irq_alloc_info(&info, NULL); - info.type = X86_IRQ_ALLOC_TYPE_HPET; - info.data = hc; - info.devid = hpet_dev_id(domain); - info.hwirq = dev_num; - - return irq_domain_alloc_irqs(domain, 1, NUMA_NO_NODE, &info); -} -#endif diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c index 7a50f0b62a70..3b8b12769f3b 100644 --- a/arch/x86/kernel/hpet.c +++ b/arch/x86/kernel/hpet.c @@ -7,6 +7,7 @@ #include <linux/cpu.h> #include <linux/irq.h> +#include <asm/irq_remapping.h> #include <asm/hpet.h> #include <asm/time.h> @@ -50,7 +51,7 @@ unsigned long hpet_address; u8 hpet_blockid; /* OS timer block num */ bool hpet_msi_disable; -#ifdef CONFIG_PCI_MSI +#ifdef CONFIG_GENERIC_MSI_IRQ static DEFINE_PER_CPU(struct hpet_channel *, cpu_hpet_channel); static struct irq_domain *hpet_domain; #endif @@ -467,9 +468,8 @@ static void __init hpet_legacy_clockevent_register(struct hpet_channel *hc) /* * HPET MSI Support */ -#ifdef CONFIG_PCI_MSI - -void hpet_msi_unmask(struct irq_data *data) +#ifdef CONFIG_GENERIC_MSI_IRQ +static void hpet_msi_unmask(struct irq_data *data) { struct hpet_channel *hc = irq_data_get_irq_handler_data(data); unsigned int cfg; @@ -479,7 +479,7 @@ void hpet_msi_unmask(struct irq_data *data) hpet_writel(cfg, HPET_Tn_CFG(hc->num)); } -void hpet_msi_mask(struct irq_data *data) +static void hpet_msi_mask(struct irq_data *data) { struct hpet_channel *hc = irq_data_get_irq_handler_data(data); unsigned int cfg; @@ -489,12 +489,118 @@ void hpet_msi_mask(struct irq_data *data) hpet_writel(cfg, HPET_Tn_CFG(hc->num)); } -void hpet_msi_write(struct hpet_channel *hc, struct msi_msg *msg) +static void hpet_msi_write(struct hpet_channel *hc, struct msi_msg *msg) { hpet_writel(msg->data, HPET_Tn_ROUTE(hc->num)); hpet_writel(msg->address_lo, HPET_Tn_ROUTE(hc->num) + 4); } +static void hpet_msi_write_msg(struct irq_data *data, struct msi_msg *msg) +{ + hpet_msi_write(irq_data_get_irq_handler_data(data), msg); +} + +static struct irq_chip hpet_msi_controller __ro_after_init = { + .name = "HPET-MSI", + .irq_unmask = hpet_msi_unmask, + .irq_mask = hpet_msi_mask, + .irq_ack = irq_chip_ack_parent, + .irq_set_affinity = msi_domain_set_affinity, + .irq_retrigger = irq_chip_retrigger_hierarchy, + .irq_write_msi_msg = hpet_msi_write_msg, + .flags = IRQCHIP_SKIP_SET_WAKE, +}; + +static int hpet_msi_init(struct irq_domain *domain, + struct msi_domain_info *info, unsigned int virq, + irq_hw_number_t hwirq, msi_alloc_info_t *arg) +{ + irq_set_status_flags(virq, IRQ_MOVE_PCNTXT); + irq_domain_set_info(domain, virq, arg->hwirq, info->chip, NULL, + handle_edge_irq, arg->data, "edge"); + + return 0; +} + +static void hpet_msi_free(struct irq_domain *domain, + struct msi_domain_info *info, unsigned int virq) +{ + irq_clear_status_flags(virq, IRQ_MOVE_PCNTXT); +} + +static struct msi_domain_ops hpet_msi_domain_ops = { + .msi_init = hpet_msi_init, + .msi_free = hpet_msi_free, +}; + +static struct msi_domain_info hpet_msi_domain_info = { + .ops = &hpet_msi_domain_ops, + .chip = &hpet_msi_controller, + .flags = MSI_FLAG_USE_DEF_DOM_OPS, +}; + +static struct irq_domain *hpet_create_irq_domain(int hpet_id) +{ + struct msi_domain_info *domain_info; + struct irq_domain *parent, *d; + struct irq_alloc_info info; + struct fwnode_handle *fn; + + if (x86_vector_domain == NULL) + return NULL; + + domain_info = kzalloc(sizeof(*domain_info), GFP_KERNEL); + if (!domain_info) + return NULL; + + *domain_info = hpet_msi_domain_info; + domain_info->data = (void *)(long)hpet_id; + + init_irq_alloc_info(&info, NULL); + info.type = X86_IRQ_ALLOC_TYPE_HPET_GET_PARENT; + info.devid = hpet_id; + parent = irq_remapping_get_irq_domain(&info); + if (parent == NULL) + parent = x86_vector_domain; + else + hpet_msi_controller.name = "IR-HPET-MSI"; + + fn = irq_domain_alloc_named_id_fwnode(hpet_msi_controller.name, + hpet_id); + if (!fn) { + kfree(domain_info); + return NULL; + } + + d = msi_create_irq_domain(fn, domain_info, parent); + if (!d) { + irq_domain_free_fwnode(fn); + kfree(domain_info); + } + return d; +} + +static inline int hpet_dev_id(struct irq_domain *domain) +{ + struct msi_domain_info *info = msi_get_domain_info(domain); + + return (int)(long)info->data; +} + +static int hpet_assign_irq(struct irq_domain *domain, struct hpet_channel *hc, + int dev_num) +{ + struct irq_alloc_info info; + + init_irq_alloc_info(&info, NULL); + info.type = X86_IRQ_ALLOC_TYPE_HPET; + info.data = hc; + info.devid = hpet_dev_id(domain); + info.hwirq = dev_num; + + return irq_domain_alloc_irqs(domain, 1, NUMA_NO_NODE, &info); +} + static int hpet_clkevt_msi_resume(struct clock_event_device *evt) { struct hpet_channel *hc = clockevent_to_channel(evt); -- 2.26.2
next prev parent reply index Thread overview: 113+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-07 12:20 [PATCH 0/5] Fix x2apic enablement and allow up to 32768 CPUs without IR where supported David Woodhouse 2020-10-07 12:20 ` [PATCH 1/5] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse 2020-10-07 12:20 ` [PATCH 2/5] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse 2020-10-07 12:20 ` [PATCH 3/5] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse 2020-10-08 9:12 ` Peter Zijlstra 2020-10-08 17:05 ` David Woodhouse 2020-10-08 11:41 ` Thomas Gleixner 2020-10-07 12:20 ` [PATCH 4/5] x86/apic: Support 15 bits of APIC ID in IOAPIC/MSI where available David Woodhouse 2020-10-08 11:54 ` Thomas Gleixner 2020-10-08 12:02 ` Thomas Gleixner 2020-10-08 13:00 ` David Woodhouse 2020-10-07 12:20 ` [PATCH 5/5] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse 2020-10-08 12:05 ` Thomas Gleixner 2020-10-08 12:55 ` David Woodhouse 2020-10-08 16:08 ` David Woodhouse 2020-10-08 21:14 ` Thomas Gleixner 2020-10-08 21:39 ` David Woodhouse 2020-10-08 23:27 ` Thomas Gleixner 2020-10-09 6:07 ` David Woodhouse 2020-10-10 10:06 ` David Woodhouse 2020-10-10 11:44 ` Thomas Gleixner 2020-10-10 11:58 ` David Woodhouse 2020-10-11 17:12 ` Thomas Gleixner 2020-10-11 21:15 ` David Woodhouse 2020-10-12 9:33 ` Thomas Gleixner 2020-10-12 16:06 ` David Woodhouse 2020-10-12 18:38 ` Thomas Gleixner 2020-10-12 20:20 ` David Woodhouse 2020-10-12 22:13 ` Thomas Gleixner 2020-10-13 7:52 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 0/9] Remove irq_remapping_get_irq_domain() David Woodhouse 2020-10-13 8:11 ` [PATCH 1/9] genirq/irqdomain: Implement get_name() method on irqchip fwnodes David Woodhouse 2020-10-13 8:11 ` [PATCH 2/9] x86/apic: Add select() method on vector irqdomain David Woodhouse 2020-10-13 8:11 ` [PATCH 3/9] iommu/amd: Implement select() method on remapping irqdomain David Woodhouse 2020-10-13 8:11 ` [PATCH 4/9] iommu/vt-d: " David Woodhouse 2020-10-13 8:11 ` [PATCH 5/9] iommu/hyper-v: " David Woodhouse 2020-10-13 8:11 ` [PATCH 6/9] x86/hpet: Use irq_find_matching_fwspec() to find " David Woodhouse 2020-10-13 8:11 ` [PATCH 7/9] x86/ioapic: " David Woodhouse 2020-10-13 8:11 ` [PATCH 8/9] x86: Kill all traces of irq_remapping_get_irq_domain() David Woodhouse 2020-10-13 8:11 ` [PATCH 9/9] iommu/vt-d: Simplify intel_irq_remapping_select() David Woodhouse 2020-10-13 9:28 ` [PATCH 5/5] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID Thomas Gleixner 2020-10-13 10:15 ` David Woodhouse 2020-10-13 10:46 ` Thomas Gleixner 2020-10-13 10:53 ` David Woodhouse 2020-10-13 11:51 ` David Woodhouse 2020-10-13 12:40 ` Thomas Gleixner 2020-10-08 11:46 ` [PATCH 1/5] x86/apic: Fix x2apic enablement without interrupt remapping Thomas Gleixner 2020-10-09 10:46 ` [PATCH v2 0/8] Fix x2apic enablement and allow up to 32768 CPUs without IR where supported David Woodhouse 2020-10-09 10:46 ` [PATCH v2 1/8] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse 2020-10-09 10:46 ` [PATCH v2 2/8] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse 2020-10-09 10:46 ` [PATCH v2 3/8] x86/apic: Always provide irq_compose_msi_msg() method for vector domain David Woodhouse 2020-10-09 10:46 ` [PATCH v2 4/8] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse 2020-10-09 10:46 ` [PATCH v2 5/8] x86/apic: Support 15 bits of APIC ID in MSI where available David Woodhouse 2020-10-09 10:46 ` [PATCH v2 6/8] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse 2020-10-09 10:46 ` [PATCH v2 7/8] x86/hpet: Move MSI support into hpet.c David Woodhouse 2020-10-09 10:46 ` [PATCH v2 8/8] x86/ioapic: Generate RTE directly from parent irqchip's MSI message David Woodhouse 2020-10-22 21:43 ` Thomas Gleixner 2020-10-22 22:10 ` Thomas Gleixner 2020-10-23 17:04 ` David Woodhouse 2020-10-23 10:10 ` David Woodhouse 2020-10-23 21:28 ` Thomas Gleixner 2020-10-24 8:26 ` David Woodhouse 2020-10-24 8:41 ` David Woodhouse 2020-10-24 9:13 ` Paolo Bonzini 2020-10-24 10:13 ` David Woodhouse 2020-10-24 12:44 ` David Woodhouse 2020-10-24 21:35 ` [PATCH v3 00/35] Fix x2apic enablement and allow more CPUs, clean up I/OAPIC and MSI bitfields David Woodhouse 2020-10-24 21:35 ` [PATCH v3 01/35] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse 2020-10-24 21:35 ` [PATCH v3 02/35] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse 2020-10-24 21:35 ` [PATCH v3 03/35] x86/apic/uv: Fix inconsistent destination mode David Woodhouse 2020-10-24 21:35 ` [PATCH v3 04/35] x86/devicetree: Fix the ioapic interrupt type table David Woodhouse 2020-10-24 21:35 ` [PATCH v3 05/35] x86/apic: Cleanup delivery mode defines David Woodhouse 2020-10-24 21:35 ` [PATCH v3 06/35] x86/apic: Replace pointless apic::dest_logical usage David Woodhouse 2020-10-24 21:35 ` [PATCH v3 07/35] x86/apic: Get rid of apic::dest_logical David Woodhouse 2020-10-24 21:35 ` [PATCH v3 08/35] x86/apic: Cleanup destination mode David Woodhouse 2020-10-24 21:35 ` [PATCH v3 09/35] x86/apic: Always provide irq_compose_msi_msg() method for vector domain David Woodhouse 2020-10-24 21:35 ` David Woodhouse [this message] 2020-10-24 21:35 ` [PATCH v3 11/35] genirq/msi: Allow shadow declarations of msi_msg::$member David Woodhouse 2020-10-24 21:35 ` [PATCH v3 12/35] x86/msi: Provide msi message shadow structs David Woodhouse 2020-10-24 21:35 ` [PATCH v3 13/35] iommu/intel: Use msi_msg " David Woodhouse 2020-10-24 21:35 ` [PATCH v3 14/35] iommu/amd: " David Woodhouse 2020-10-24 21:35 ` [PATCH v3 15/35] PCI: vmd: " David Woodhouse 2020-10-28 20:49 ` Kees Cook 2020-10-28 21:13 ` Thomas Gleixner 2020-10-28 23:22 ` Kees Cook 2020-10-24 21:35 ` [PATCH v3 16/35] x86/kvm: " David Woodhouse 2020-10-24 21:35 ` [PATCH v3 17/35] x86/pci/xen: " David Woodhouse 2020-10-25 9:49 ` David Laight 2020-10-25 10:26 ` David Woodhouse 2020-10-25 13:20 ` David Laight 2020-10-24 21:35 ` [PATCH v3 18/35] x86/msi: Remove msidef.h David Woodhouse 2020-10-24 21:35 ` [PATCH v3 19/35] x86/io_apic: Cleanup trigger/polarity helpers David Woodhouse 2020-11-10 6:31 ` Qian Cai 2020-11-10 8:59 ` David Woodhouse 2020-11-10 16:26 ` Paolo Bonzini 2020-10-24 21:35 ` [PATCH v3 20/35] x86/ioapic: Cleanup IO/APIC route entry structs David Woodhouse 2020-10-24 21:35 ` [PATCH v3 21/35] x86/ioapic: Generate RTE directly from parent irqchip's MSI message David Woodhouse 2020-10-24 21:35 ` [PATCH v3 22/35] genirq/irqdomain: Implement get_name() method on irqchip fwnodes David Woodhouse 2020-10-25 9:41 ` Marc Zyngier 2020-10-24 21:35 ` [PATCH v3 23/35] x86/apic: Add select() method on vector irqdomain David Woodhouse 2020-10-24 21:35 ` [PATCH v3 24/35] iommu/amd: Implement select() method on remapping irqdomain David Woodhouse 2020-10-24 21:35 ` [PATCH v3 25/35] iommu/vt-d: " David Woodhouse 2020-10-24 21:35 ` [PATCH v3 26/35] iommu/hyper-v: " David Woodhouse 2020-10-24 21:35 ` [PATCH v3 27/35] x86/hpet: Use irq_find_matching_fwspec() to find " David Woodhouse 2020-10-24 21:35 ` [PATCH v3 28/35] x86/ioapic: " David Woodhouse 2020-10-24 21:35 ` [PATCH v3 29/35] x86: Kill all traces of irq_remapping_get_irq_domain() David Woodhouse 2020-10-24 21:35 ` [PATCH v3 30/35] iommu/vt-d: Simplify intel_irq_remapping_select() David Woodhouse 2020-10-24 21:35 ` [PATCH v3 31/35] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse 2020-10-24 21:35 ` [PATCH v3 32/35] x86/apic: Support 15 bits of APIC ID in MSI where available David Woodhouse 2020-10-24 21:35 ` [PATCH v3 33/35] iommu/hyper-v: Disable IRQ pseudo-remapping if 15 bit APIC IDs are available David Woodhouse 2020-10-24 21:35 ` [PATCH v3 34/35] x86/kvm: Reserve KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse 2020-10-24 21:35 ` [PATCH v3 35/35] x86/kvm: Enable 15-bit extension when KVM_FEATURE_MSI_EXT_DEST_ID detected David Woodhouse 2020-10-25 8:12 ` [PATCH v3 00/35] Fix x2apic enablement and allow more CPUs, clean up I/OAPIC and MSI bitfields David Woodhouse
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