From: Andrew Jones <drjones@redhat.com>
To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu
Cc: pbonzini@redhat.com, maz@kernel.org, Dave.Martin@arm.com,
peter.maydell@linaro.org, eric.auger@redhat.com
Subject: [PATCH v2 2/3] KVM: selftests: Update aarch64 get-reg-list blessed list
Date: Mon, 2 Nov 2020 20:02:52 +0100 [thread overview]
Message-ID: <20201102190253.50575-3-drjones@redhat.com> (raw)
In-Reply-To: <20201102190253.50575-1-drjones@redhat.com>
The new registers come from the following commits:
commit 99adb567632b ("KVM: arm/arm64: Add save/restore support for
firmware workaround state")
commit c773ae2b3476 ("KVM: arm64: Save/Restore guest DISR_EL1")
commit 03fdfb269009 ("KVM: arm64: Don't write junk to sysregs on reset")
The last commit, which adds ARM64_SYS_REG(3, 3, 9, 12, 0) (PMCR_EL0),
and was committed for v5.3, doesn't indicate in its commit message that
enumerating it for save/restore was the plan. It's a good idea anyway,
since the other PMU registers have been enumerated since v4.10.
Signed-off-by: Andrew Jones <drjones@redhat.com>
---
tools/testing/selftests/kvm/aarch64/get-reg-list.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/tools/testing/selftests/kvm/aarch64/get-reg-list.c b/tools/testing/selftests/kvm/aarch64/get-reg-list.c
index 6fae4c3cb0c6..db97001f37f7 100644
--- a/tools/testing/selftests/kvm/aarch64/get-reg-list.c
+++ b/tools/testing/selftests/kvm/aarch64/get-reg-list.c
@@ -352,7 +352,10 @@ int main(int ac, char **av)
}
/*
- * The current blessed list comes from kernel version v4.15 with --core-reg-fixup
+ * The current blessed list was primed with the output of kernel version
+ * v4.15 with --core-reg-fixup and then later updated with new registers.
+ *
+ * The blessed list is up to date with kernel version v5.10-rc2
*/
static __u64 blessed_reg[] = {
KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(regs.regs[0]),
@@ -430,6 +433,9 @@ static __u64 blessed_reg[] = {
KVM_REG_ARM64 | KVM_REG_SIZE_U128 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(fp_regs.vregs[31]),
KVM_REG_ARM64 | KVM_REG_SIZE_U32 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(fp_regs.fpsr),
KVM_REG_ARM64 | KVM_REG_SIZE_U32 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(fp_regs.fpcr),
+ KVM_REG_ARM_FW_REG(0),
+ KVM_REG_ARM_FW_REG(1),
+ KVM_REG_ARM_FW_REG(2),
ARM64_SYS_REG(3, 3, 14, 3, 1), /* CNTV_CTL_EL0 */
ARM64_SYS_REG(3, 3, 14, 3, 2), /* CNTV_CVAL_EL0 */
ARM64_SYS_REG(3, 3, 14, 0, 2),
@@ -578,10 +584,12 @@ static __u64 blessed_reg[] = {
ARM64_SYS_REG(3, 0, 10, 2, 0), /* MAIR_EL1 */
ARM64_SYS_REG(3, 0, 10, 3, 0), /* AMAIR_EL1 */
ARM64_SYS_REG(3, 0, 12, 0, 0), /* VBAR_EL1 */
+ ARM64_SYS_REG(3, 0, 12, 1, 1), /* DISR_EL1 */
ARM64_SYS_REG(3, 0, 13, 0, 1), /* CONTEXTIDR_EL1 */
ARM64_SYS_REG(3, 0, 13, 0, 4), /* TPIDR_EL1 */
ARM64_SYS_REG(3, 0, 14, 1, 0), /* CNTKCTL_EL1 */
ARM64_SYS_REG(3, 2, 0, 0, 0), /* CSSELR_EL1 */
+ ARM64_SYS_REG(3, 3, 9, 12, 0), /* PMCR_EL0 */
ARM64_SYS_REG(3, 3, 9, 12, 1), /* PMCNTENSET_EL0 */
ARM64_SYS_REG(3, 3, 9, 12, 2), /* PMCNTENCLR_EL0 */
ARM64_SYS_REG(3, 3, 9, 12, 3), /* PMOVSCLR_EL0 */
--
2.26.2
next prev parent reply other threads:[~2020-11-02 19:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-02 19:02 [PATCH v2 0/3] KVM: selftests: Add get-reg-list regression test Andrew Jones
2020-11-02 19:02 ` [PATCH v2 1/3] KVM: selftests: Add aarch64 get-reg-list test Andrew Jones
2020-11-02 19:02 ` Andrew Jones [this message]
2020-11-02 19:02 ` [PATCH v2 3/3] KVM: selftests: Add blessed SVE registers to get-reg-list Andrew Jones
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