From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6230FC4361B for ; Tue, 8 Dec 2020 04:27:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 31D9323A5E for ; Tue, 8 Dec 2020 04:27:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726289AbgLHE16 (ORCPT ); Mon, 7 Dec 2020 23:27:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725917AbgLHE16 (ORCPT ); Mon, 7 Dec 2020 23:27:58 -0500 Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6BB5C061749 for ; Mon, 7 Dec 2020 20:27:17 -0800 (PST) Received: by ozlabs.org (Postfix, from userid 1007) id 4CqnFt0gnCz9sW0; Tue, 8 Dec 2020 15:27:14 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1607401634; bh=mLyOVhZ4oR5+tNvzHEh2SyeDztIphEHMovVY51ggypE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=otGoUEr3F0jJHjzIxwnmjcR/tXCYQC2ipuLDclv8VzbiVgvpfU5F5eRLIYtg3mdaR RM3hjKME3yJn/yUcBMAL1ZeV26OnYJYCEf2TFfQBdvYBp1uEsslbMMYjsOSb7meJsV eceQkRMNUelGTQi0VrNCFDbimXn86KdQKWr1S+MM= Date: Tue, 8 Dec 2020 13:57:28 +1100 From: David Gibson To: Cornelia Huck Cc: "Dr. David Alan Gilbert" , Christian Borntraeger , pair@us.ibm.com, pbonzini@redhat.com, frankja@linux.ibm.com, brijesh.singh@amd.com, qemu-devel@nongnu.org, Eduardo Habkost , qemu-ppc@nongnu.org, rth@twiddle.net, thuth@redhat.com, berrange@redhat.com, mdroth@linux.vnet.ibm.com, Marcelo Tosatti , "Michael S. Tsirkin" , Marcel Apfelbaum , david@redhat.com, Richard Henderson , kvm@vger.kernel.org, qemu-s390x@nongnu.org, pasic@linux.ibm.com Subject: Re: [for-6.0 v5 00/13] Generalize memory encryption models Message-ID: <20201208025728.GD2555@yekko.fritz.box> References: <20201204054415.579042-1-david@gibson.dropbear.id.au> <20201204140205.66e205da.cohuck@redhat.com> <20201204130727.GD2883@work-vm> <20201204141229.688b11e4.cohuck@redhat.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ylS2wUBXLOxYXZFQ" Content-Disposition: inline In-Reply-To: <20201204141229.688b11e4.cohuck@redhat.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org --ylS2wUBXLOxYXZFQ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Dec 04, 2020 at 02:12:29PM +0100, Cornelia Huck wrote: > On Fri, 4 Dec 2020 13:07:27 +0000 > "Dr. David Alan Gilbert" wrote: >=20 > > * Cornelia Huck (cohuck@redhat.com) wrote: > > > On Fri, 4 Dec 2020 09:06:50 +0100 > > > Christian Borntraeger wrote: > > > =20 > > > > On 04.12.20 06:44, David Gibson wrote: =20 > > > > > A number of hardware platforms are implementing mechanisms whereb= y the > > > > > hypervisor does not have unfettered access to guest memory, in or= der > > > > > to mitigate the security impact of a compromised hypervisor. > > > > >=20 > > > > > AMD's SEV implements this with in-cpu memory encryption, and Inte= l has > > > > > its own memory encryption mechanism. POWER has an upcoming mecha= nism > > > > > to accomplish this in a different way, using a new memory protect= ion > > > > > level plus a small trusted ultravisor. s390 also has a protected > > > > > execution environment. > > > > >=20 > > > > > The current code (committed or draft) for these features has each > > > > > platform's version configured entirely differently. That doesn't= seem > > > > > ideal for users, or particularly for management layers. > > > > >=20 > > > > > AMD SEV introduces a notionally generic machine option > > > > > "machine-encryption", but it doesn't actually cover any cases oth= er > > > > > than SEV. > > > > >=20 > > > > > This series is a proposal to at least partially unify configurati= on > > > > > for these mechanisms, by renaming and generalizing AMD's > > > > > "memory-encryption" property. It is replaced by a > > > > > "securable-guest-memory" property pointing to a platform specific= =20 > > > >=20 > > > > Can we do "securable-guest" ? > > > > s390x also protects registers and integrity. memory is only one pie= ce > > > > of the puzzle and what we protect might differ from platform to=20 > > > > platform. > > > > =20 > > >=20 > > > I agree. Even technologies that currently only do memory encryption m= ay > > > be enhanced with more protections later. =20 > >=20 > > There's already SEV-ES patches onlist for this on the SEV side. > >=20 > > > >=20 > > Perhaps 'confidential guest' is actually what we need, since the > > marketing folks seem to have started labelling this whole idea > > 'confidential computing'. That's not a bad idea, much as I usually hate marketing terms. But it does seem to be becoming a general term for this style of thing, and it doesn't overlap too badly with other terms ("secure" and "protected" are also used for hypervisor-from-guest and guest-from-guest protection). > It's more like a 'possibly confidential guest', though. Hmm. What about "Confidential Guest Facility" or "Confidential Guest Mechanism"? The implication being that the facility is there, whether or not the guest actually uses it. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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