From: Andre Przywara <andre.przywara@arm.com>
To: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: drjones@redhat.com, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu
Subject: Re: [kvm-unit-tests PATCH 4/6] lib: arm64: Consolidate register definitions to sysreg.h
Date: Wed, 3 Mar 2021 17:32:34 +0000 [thread overview]
Message-ID: <20210303173234.6d6cec51@slackpad.fritz.box> (raw)
In-Reply-To: <20210227104201.14403-5-alexandru.elisei@arm.com>
On Sat, 27 Feb 2021 10:41:59 +0000
Alexandru Elisei <alexandru.elisei@arm.com> wrote:
> Move system register field definitions to sysreg.h, where the opcodes for
> system register access are defined, to align ourselves with the Linux
> kernel. EL2 support, needed for EFI and nested virtualization testing, will
> require additional register and field definions, and having them in the
> same place as Linux will make maintenance easier.
>
> Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Checked to be just moves, and it compiles, so:
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cheers,
Andre
> ---
> lib/arm64/asm/arch_gicv3.h | 6 ------
> lib/arm64/asm/processor.h | 10 ----------
> lib/arm64/asm/sysreg.h | 17 +++++++++++++++++
> arm/cstart64.S | 2 +-
> 4 files changed, 18 insertions(+), 17 deletions(-)
>
> diff --git a/lib/arm64/asm/arch_gicv3.h b/lib/arm64/asm/arch_gicv3.h
> index a7994ec2fbbe..fdee4de1f1f6 100644
> --- a/lib/arm64/asm/arch_gicv3.h
> +++ b/lib/arm64/asm/arch_gicv3.h
> @@ -10,12 +10,6 @@
>
> #include <asm/sysreg.h>
>
> -#define ICC_PMR_EL1 sys_reg(3, 0, 4, 6, 0)
> -#define ICC_SGI1R_EL1 sys_reg(3, 0, 12, 11, 5)
> -#define ICC_IAR1_EL1 sys_reg(3, 0, 12, 12, 0)
> -#define ICC_EOIR1_EL1 sys_reg(3, 0, 12, 12, 1)
> -#define ICC_GRPEN1_EL1 sys_reg(3, 0, 12, 12, 7)
> -
> #ifndef __ASSEMBLY__
>
> #include <libcflat.h>
> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> index cdc2463e1981..4a3d826ab560 100644
> --- a/lib/arm64/asm/processor.h
> +++ b/lib/arm64/asm/processor.h
> @@ -6,16 +6,6 @@
> * This work is licensed under the terms of the GNU LGPL, version 2.
> */
>
> -/* System Control Register (SCTLR_EL1) bits */
> -#define SCTLR_EL1_EE (1 << 25)
> -#define SCTLR_EL1_WXN (1 << 19)
> -#define SCTLR_EL1_I (1 << 12)
> -#define SCTLR_EL1_SA0 (1 << 4)
> -#define SCTLR_EL1_SA (1 << 3)
> -#define SCTLR_EL1_C (1 << 2)
> -#define SCTLR_EL1_A (1 << 1)
> -#define SCTLR_EL1_M (1 << 0)
> -
> #ifndef __ASSEMBLY__
> #include <asm/ptrace.h>
> #include <asm/esr.h>
> diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h
> index 378bf7ebb3b5..9d6b4fc66936 100644
> --- a/lib/arm64/asm/sysreg.h
> +++ b/lib/arm64/asm/sysreg.h
> @@ -70,4 +70,21 @@ asm(
> " .endm\n"
> );
> #endif /* __ASSEMBLY__ */
> +
> +#define ICC_PMR_EL1 sys_reg(3, 0, 4, 6, 0)
> +#define ICC_SGI1R_EL1 sys_reg(3, 0, 12, 11, 5)
> +#define ICC_IAR1_EL1 sys_reg(3, 0, 12, 12, 0)
> +#define ICC_EOIR1_EL1 sys_reg(3, 0, 12, 12, 1)
> +#define ICC_GRPEN1_EL1 sys_reg(3, 0, 12, 12, 7)
> +
> +/* System Control Register (SCTLR_EL1) bits */
> +#define SCTLR_EL1_EE (1 << 25)
> +#define SCTLR_EL1_WXN (1 << 19)
> +#define SCTLR_EL1_I (1 << 12)
> +#define SCTLR_EL1_SA0 (1 << 4)
> +#define SCTLR_EL1_SA (1 << 3)
> +#define SCTLR_EL1_C (1 << 2)
> +#define SCTLR_EL1_A (1 << 1)
> +#define SCTLR_EL1_M (1 << 0)
> +
> #endif /* _ASMARM64_SYSREG_H_ */
> diff --git a/arm/cstart64.S b/arm/cstart64.S
> index c1deff842f03..f6c5d2ebccf3 100644
> --- a/arm/cstart64.S
> +++ b/arm/cstart64.S
> @@ -10,9 +10,9 @@
> #include <asm/asm-offsets.h>
> #include <asm/assembler.h>
> #include <asm/ptrace.h>
> -#include <asm/processor.h>
> #include <asm/page.h>
> #include <asm/pgtable-hwdef.h>
> +#include <asm/sysreg.h>
>
> .section .init
>
next prev parent reply other threads:[~2021-03-04 0:29 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-27 10:41 [kvm-unit-tests PATCH 0/6] Misc assembly fixes and cleanups Alexandru Elisei
2021-02-27 10:41 ` [kvm-unit-tests PATCH 1/6] arm64: Remove unnecessary ISB when writing to SPSel Alexandru Elisei
2021-03-03 17:35 ` Andre Przywara
2021-02-27 10:41 ` [kvm-unit-tests PATCH 2/6] arm/arm64: Remove dcache_line_size global variable Alexandru Elisei
2021-03-04 15:00 ` Andre Przywara
2021-03-15 15:46 ` Alexandru Elisei
2021-03-16 15:40 ` Andre Przywara
2021-03-22 12:01 ` Alexandru Elisei
2021-02-27 10:41 ` [kvm-unit-tests PATCH 3/6] arm/arm64: Remove unnecessary ISB when doing dcache maintenance Alexandru Elisei
2021-03-12 14:59 ` Andrew Jones
2021-03-15 16:22 ` Alexandru Elisei
2021-02-27 10:41 ` [kvm-unit-tests PATCH 4/6] lib: arm64: Consolidate register definitions to sysreg.h Alexandru Elisei
2021-03-03 17:32 ` Andre Przywara [this message]
2021-02-27 10:42 ` [kvm-unit-tests PATCH 5/6] arm64: Configure SCTLR_EL1 at boot Alexandru Elisei
2021-03-03 17:32 ` Andre Przywara
2021-02-27 10:42 ` [kvm-unit-tests PATCH 6/6] arm64: Disable TTBR1_EL1 translation table walks Alexandru Elisei
2021-03-03 17:32 ` Andre Przywara
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