From: Like Xu <like.xu@linux.intel.com>
To: peterz@infradead.org, Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: eranian@google.com, andi@firstfloor.org,
kan.liang@linux.intel.com, wei.w.wang@intel.com,
Wanpeng Li <wanpengli@tencent.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, x86@kernel.org,
linux-kernel@vger.kernel.org, Like Xu <like.xu@linux.intel.com>
Subject: [PATCH v4 15/16] KVM: x86/cpuid: Refactor host/guest CPU model consistency check
Date: Mon, 29 Mar 2021 13:41:36 +0800 [thread overview]
Message-ID: <20210329054137.120994-16-like.xu@linux.intel.com> (raw)
In-Reply-To: <20210329054137.120994-1-like.xu@linux.intel.com>
For the same purpose, the leagcy intel_pmu_lbr_is_compatible() could be
renamed for reuse by more callers for the same purpose and remove the
comment about LBR use case incidentally.
Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
arch/x86/kvm/cpuid.h | 5 +++++
arch/x86/kvm/vmx/pmu_intel.c | 12 +-----------
arch/x86/kvm/vmx/vmx.c | 2 +-
arch/x86/kvm/vmx/vmx.h | 1 -
4 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index 2a0c5064497f..fb478fb45b9e 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -270,6 +270,11 @@ static inline int guest_cpuid_model(struct kvm_vcpu *vcpu)
return x86_model(best->eax);
}
+static inline bool cpuid_model_is_consistent(struct kvm_vcpu *vcpu)
+{
+ return boot_cpu_data.x86_model == guest_cpuid_model(vcpu);
+}
+
static inline int guest_cpuid_stepping(struct kvm_vcpu *vcpu)
{
struct kvm_cpuid_entry2 *best;
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 3c1ee59571d9..4fe13cf80bb5 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -173,16 +173,6 @@ static inline struct kvm_pmc *get_fw_gp_pmc(struct kvm_pmu *pmu, u32 msr)
return get_gp_pmc(pmu, msr, MSR_IA32_PMC0);
}
-bool intel_pmu_lbr_is_compatible(struct kvm_vcpu *vcpu)
-{
- /*
- * As a first step, a guest could only enable LBR feature if its
- * cpu model is the same as the host because the LBR registers
- * would be pass-through to the guest and they're model specific.
- */
- return boot_cpu_data.x86_model == guest_cpuid_model(vcpu);
-}
-
bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu)
{
struct x86_pmu_lbr *lbr = vcpu_to_lbr_records(vcpu);
@@ -576,7 +566,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
nested_vmx_pmu_entry_exit_ctls_update(vcpu);
- if (intel_pmu_lbr_is_compatible(vcpu))
+ if (cpuid_model_is_consistent(vcpu))
x86_perf_get_lbr(&lbr_desc->records);
else
lbr_desc->records.nr = 0;
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 966fa7962808..b0f2cb790359 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -2259,7 +2259,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
if ((data & PMU_CAP_LBR_FMT) !=
(vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT))
return 1;
- if (!intel_pmu_lbr_is_compatible(vcpu))
+ if (!cpuid_model_is_consistent(vcpu))
return 1;
}
ret = kvm_set_msr_common(vcpu, msr_info);
diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index 0029aaad8eda..d214b6c43886 100644
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -97,7 +97,6 @@ union vmx_exit_reason {
#define vcpu_to_lbr_records(vcpu) (&to_vmx(vcpu)->lbr_desc.records)
void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu);
-bool intel_pmu_lbr_is_compatible(struct kvm_vcpu *vcpu);
bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu);
int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu);
--
2.29.2
next prev parent reply other threads:[~2021-03-29 5:51 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-29 5:41 [PATCH v4 00/16] KVM: x86/pmu: Add basic support to enable Guest PEBS via DS Like Xu
2021-03-29 5:41 ` [PATCH v4 01/16] perf/x86/intel: Add x86_pmu.pebs_vmx for Ice Lake Servers Like Xu
2021-04-06 3:24 ` Liuxiangdong (Aven, Cloud Infrastructure Service Product Dept.)
2021-04-06 5:14 ` Xu, Like
2021-04-08 1:40 ` Liuxiangdong (Aven, Cloud Infrastructure Service Product Dept.)
2021-04-09 8:33 ` Liuxiangdong (Aven, Cloud Infrastructure Service Product Dept.)
2021-04-09 8:46 ` Like Xu
2021-04-12 11:26 ` Liuxiangdong (Aven, Cloud Infrastructure Service Product Dept.)
2021-04-12 15:25 ` Andi Kleen
2021-04-14 14:10 ` Liuxiangdong
2021-04-14 14:49 ` Liuxiangdong
2021-04-15 1:38 ` Xu, Like
2021-04-15 2:49 ` Liuxiangdong
2021-04-15 3:23 ` Like Xu
2021-04-06 12:47 ` Andi Kleen
2021-04-07 3:05 ` Liuxiangdong (Aven, Cloud Infrastructure Service Product Dept.)
2021-04-07 14:32 ` Andi Kleen
2021-03-29 5:41 ` [PATCH v4 02/16] perf/x86/intel: Handle guest PEBS overflow PMI for KVM guest Like Xu
2021-04-06 16:22 ` Peter Zijlstra
2021-04-07 0:47 ` Xu, Like
2021-03-29 5:41 ` [PATCH v4 03/16] perf/x86/core: Pass "struct kvm_pmu *" to determine the guest values Like Xu
2021-03-29 5:41 ` [PATCH v4 04/16] KVM: x86/pmu: Set MSR_IA32_MISC_ENABLE_EMON bit when vPMU is enabled Like Xu
2021-03-29 5:41 ` [PATCH v4 05/16] KVM: x86/pmu: Introduce the ctrl_mask value for fixed counter Like Xu
2021-03-29 5:41 ` [PATCH v4 06/16] KVM: x86/pmu: Reprogram guest PEBS event to emulate guest PEBS counter Like Xu
2021-04-07 8:40 ` Peter Zijlstra
2021-03-29 5:41 ` [PATCH v4 07/16] KVM: x86/pmu: Add IA32_PEBS_ENABLE MSR emulation for extended PEBS Like Xu
2021-04-07 8:56 ` Peter Zijlstra
2021-04-07 15:25 ` Peter Zijlstra
2021-03-29 5:41 ` [PATCH v4 08/16] KVM: x86/pmu: Add IA32_DS_AREA MSR emulation to manage guest DS buffer Like Xu
2021-04-07 15:39 ` Peter Zijlstra
2021-04-08 5:39 ` Xu, Like
2021-04-08 7:52 ` Peter Zijlstra
2021-04-08 8:44 ` Xu, Like
2021-04-09 7:07 ` Xu, Like
2021-04-09 7:59 ` Peter Zijlstra
2021-04-09 8:30 ` Xu, Like
2021-03-29 5:41 ` [PATCH v4 09/16] KVM: x86/pmu: Add PEBS_DATA_CFG MSR emulation to support adaptive PEBS Like Xu
2021-04-07 15:40 ` Peter Zijlstra
2021-03-29 5:41 ` [PATCH v4 10/16] KVM: x86: Set PEBS_UNAVAIL in IA32_MISC_ENABLE when PEBS is enabled Like Xu
2021-03-29 5:41 ` [PATCH v4 11/16] KVM: x86/pmu: Adjust precise_ip to emulate Ice Lake guest PDIR counter Like Xu
2021-03-29 5:41 ` [PATCH v4 12/16] KVM: x86/pmu: Move pmc_speculative_in_use() to arch/x86/kvm/pmu.h Like Xu
2021-03-29 5:41 ` [PATCH v4 13/16] KVM: x86/pmu: Disable guest PEBS before vm-entry in two cases Like Xu
2021-03-29 5:41 ` [PATCH v4 14/16] KVM: x86/pmu: Add kvm_pmu_cap to optimize perf_get_x86_pmu_capability Like Xu
2021-03-29 5:41 ` Like Xu [this message]
2021-03-29 5:41 ` [PATCH v4 16/16] KVM: x86/pmu: Expose CPUIDs feature bits PDCM, DS, DTES64 Like Xu
2021-04-06 3:19 ` [PATCH v4 00/16] KVM: x86/pmu: Add basic support to enable Guest PEBS via DS Xu, Like
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