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From: Like Xu <like.xu@linux.intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <seanjc@google.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	weijiang.yang@intel.com, wei.w.wang@intel.com,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [RESEND PATCH v4 02/10] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers
Date: Mon, 10 May 2021 16:15:26 +0800	[thread overview]
Message-ID: <20210510081535.94184-3-like.xu@linux.intel.com> (raw)
In-Reply-To: <20210510081535.94184-1-like.xu@linux.intel.com>

The x86_pmu.lbr_info is 0 unless explicitly initialized, so there's
no point checking x86_pmu.intel_cap.lbr_format.

Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
---
I personally recommend this patch to hit the mainline through the KVM tree.

 arch/x86/events/intel/lbr.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
index 76dbab6ac9fb..f72276f4a5ce 100644
--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -1833,12 +1833,10 @@ void __init intel_pmu_arch_lbr_init(void)
  */
 int x86_perf_get_lbr(struct x86_pmu_lbr *lbr)
 {
-	int lbr_fmt = x86_pmu.intel_cap.lbr_format;
-
 	lbr->nr = x86_pmu.lbr_nr;
 	lbr->from = x86_pmu.lbr_from;
 	lbr->to = x86_pmu.lbr_to;
-	lbr->info = (lbr_fmt == LBR_FORMAT_INFO) ? x86_pmu.lbr_info : 0;
+	lbr->info = x86_pmu.lbr_info;
 
 	return 0;
 }
-- 
2.31.1


  parent reply	other threads:[~2021-05-10  8:16 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-10  8:15 [RESEND PATCH v4 00/10] KVM: x86/pmu: Guest Architectural LBR Enabling Like Xu
2021-05-10  8:15 ` [RESEND PATCH v4 01/10] perf/x86/intel: Fix the comment about guest LBR support on KVM Like Xu
2021-05-10  8:15 ` Like Xu [this message]
2021-05-10  8:15 ` [RESEND PATCH v4 03/10] KVM: vmx/pmu: Add MSR_ARCH_LBR_DEPTH emulation for Arch LBR Like Xu
2021-06-23 18:03   ` Jim Mattson
2021-06-24  1:31     ` Yang Weijiang
2021-05-10  8:15 ` [RESEND PATCH v4 04/10] KVM: vmx/pmu: Add MSR_ARCH_LBR_CTL " Like Xu
2021-06-23 18:29   ` Jim Mattson
2021-06-24  1:35     ` Yang Weijiang
2021-05-10  8:15 ` [RESEND PATCH v4 05/10] KVM: vmx/pmu: Add Arch LBR emulation and its VMCS field Like Xu
2021-05-10  8:15 ` [RESEND PATCH v4 06/10] KVM: x86: Expose Architectural LBR CPUID leaf Like Xu
2021-05-10  8:15 ` [RESEND PATCH v4 07/10] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Like Xu
2021-05-10  8:15 ` [RESEND PATCH v4 08/10] KVM: x86: Report XSS as an MSR to be saved if there are supported features Like Xu
2021-05-10  8:15 ` [RESEND PATCH v4 09/10] KVM: x86: Refine the matching and clearing logic for supported_xss Like Xu
2021-05-10  8:15 ` [RESEND PATCH v4 10/10] KVM: x86: Add XSAVE Support for Architectural LBRs Like Xu
2021-05-10  8:15 ` [RESEND kvm-unit-tests PATCH v2] x86: Update guest LBR tests for Architectural LBR Like Xu
2021-06-22  9:01 ` [RESEND PATCH v4 00/10] KVM: x86/pmu: Guest Architectural LBR Enabling Yang Weijiang
2021-06-23 13:32   ` Like Xu

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