From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99ED7C48BC2 for ; Thu, 24 Jun 2021 01:20:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 759C261026 for ; Thu, 24 Jun 2021 01:20:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229882AbhFXBWz (ORCPT ); Wed, 23 Jun 2021 21:22:55 -0400 Received: from mga18.intel.com ([134.134.136.126]:23743 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229759AbhFXBWy (ORCPT ); Wed, 23 Jun 2021 21:22:54 -0400 IronPort-SDR: Rp3uolIvG4kSR8A0qwJuUEj5I4iwMU5PhV9nXrYVpyGOlD0iHuq4MLquymIJr+1mbt1r5YIP6p YdbxoylfX9zg== X-IronPort-AV: E=McAfee;i="6200,9189,10024"; a="194676400" X-IronPort-AV: E=Sophos;i="5.83,295,1616482800"; d="scan'208";a="194676400" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2021 18:20:36 -0700 IronPort-SDR: tac5mdNb3TRW2zCX7aYeaEw/PrSAYMm4FPomcKXiPCsXeARGJjj/ei0UhvRMipfXkfRn6aXZ8J FFhGHxLxycXw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,295,1616482800"; d="scan'208";a="557156873" Received: from michael-optiplex-9020.sh.intel.com (HELO localhost) ([10.239.159.182]) by fmsmga001.fm.intel.com with ESMTP; 23 Jun 2021 18:20:32 -0700 Date: Thu, 24 Jun 2021 09:35:10 +0800 From: Yang Weijiang To: Jim Mattson Cc: Like Xu , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Joerg Roedel , Yang Weijiang , Wei Wang , kvm list , LKML Subject: Re: [RESEND PATCH v4 04/10] KVM: vmx/pmu: Add MSR_ARCH_LBR_CTL emulation for Arch LBR Message-ID: <20210624013510.GB15841@intel.com> References: <20210510081535.94184-1-like.xu@linux.intel.com> <20210510081535.94184-5-like.xu@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed, Jun 23, 2021 at 11:29:08AM -0700, Jim Mattson wrote: > On Mon, May 10, 2021 at 1:16 AM Like Xu wrote: > > > > Arch LBRs are enabled by setting MSR_ARCH_LBR_CTL.LBREn to 1. A new guest > > state field named "Guest IA32_LBR_CTL" is added to enhance guest LBR usage. > > When guest Arch LBR is enabled, a guest LBR event will be created like the > > model-specific LBR does. > > > > On processors that support Arch LBR, MSR_IA32_DEBUGCTLMSR[bit 0] has no > > meaning. It can be written to 0 or 1, but reads will always return 0. > > Like IA32_DEBUGCTL, IA32_ARCH_LBR_CTL msr is also reserved on INIT. > > > > Signed-off-by: Like Xu > > --- > > arch/x86/events/intel/lbr.c | 2 -- > > arch/x86/include/asm/msr-index.h | 1 + > > arch/x86/include/asm/vmx.h | 2 ++ > > arch/x86/kvm/vmx/pmu_intel.c | 31 ++++++++++++++++++++++++++----- > > arch/x86/kvm/vmx/vmx.c | 9 +++++++++ > > 5 files changed, 38 insertions(+), 7 deletions(-) > > > Same comments as on the previous patch. Your guard for ensuring that > the new VMCS fields exist can be spoofed by a malicious userspace, and > the new MSR has to be enumerated by KVM_GET_MSR_INDEX_LIST. OK, will modify the code, thanks!