From: Oliver Upton <oupton@google.com>
To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Marc Zyngier <maz@kernel.org>, Peter Shier <pshier@google.com>,
Jim Mattson <jmattson@google.com>,
David Matlack <dmatlack@google.com>,
Ricardo Koller <ricarkol@google.com>,
Jing Zhang <jingzhangos@google.com>,
Raghavendra Rao Anata <rananta@google.com>,
James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
linux-arm-kernel@lists.infradead.org,
Andrew Jones <drjones@redhat.com>, Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Oliver Upton <oupton@google.com>
Subject: [PATCH v7 4/7] arm64: cpufeature: Enumerate support for FEAT_ECV >= 0x2
Date: Mon, 16 Aug 2021 00:12:14 +0000 [thread overview]
Message-ID: <20210816001217.3063400-5-oupton@google.com> (raw)
In-Reply-To: <20210816001217.3063400-1-oupton@google.com>
Introduce a new cpucap to indicate if the system supports full enhanced
counter virtualization (i.e. ID_AA64MMFR0_EL1.ECV>=0x2).
Signed-off-by: Oliver Upton <oupton@google.com>
---
arch/arm64/include/asm/sysreg.h | 1 +
arch/arm64/kernel/cpufeature.c | 10 ++++++++++
arch/arm64/tools/cpucaps | 1 +
3 files changed, 12 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 943d31d92b5b..c7ddf9a71134 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -847,6 +847,7 @@
#define ID_AA64MMFR0_ASID_SHIFT 4
#define ID_AA64MMFR0_PARANGE_SHIFT 0
+#define ID_AA64MMFR0_ECV_PHYS 0x2
#define ID_AA64MMFR0_TGRAN4_NI 0xf
#define ID_AA64MMFR0_TGRAN4_SUPPORTED 0x0
#define ID_AA64MMFR0_TGRAN64_NI 0xf
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 0ead8bfedf20..b44cef8deacc 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -2301,6 +2301,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.matches = has_cpuid_feature,
.min_field_value = 1,
},
+ {
+ .desc = "Enhanced Counter Virtualization (Physical)",
+ .capability = ARM64_HAS_ECV2,
+ .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+ .sys_reg = SYS_ID_AA64MMFR0_EL1,
+ .sign = FTR_UNSIGNED,
+ .field_pos = ID_AA64MMFR0_ECV_SHIFT,
+ .matches = has_cpuid_feature,
+ .min_field_value = ID_AA64MMFR0_ECV_PHYS,
+ },
{},
};
diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
index 49305c2e6dfd..f73a30d5fb1c 100644
--- a/arch/arm64/tools/cpucaps
+++ b/arch/arm64/tools/cpucaps
@@ -18,6 +18,7 @@ HAS_CRC32
HAS_DCPODP
HAS_DCPOP
HAS_E0PD
+HAS_ECV2
HAS_EPAN
HAS_GENERIC_AUTH
HAS_GENERIC_AUTH_ARCH
--
2.33.0.rc1.237.g0d66db33f3-goog
next prev parent reply other threads:[~2021-08-16 0:12 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-16 0:12 [PATCH v7 0/7] KVM: arm64: Add idempotent controls to migrate guest counter Oliver Upton
2021-08-16 0:12 ` [PATCH v7 1/7] KVM: arm64: Refactor update_vtimer_cntvoff() Oliver Upton
2021-08-16 0:12 ` [PATCH v7 2/7] KVM: arm64: Separate guest/host counter offset values Oliver Upton
2021-08-16 0:12 ` [PATCH v7 3/7] KVM: arm64: Allow userspace to configure a vCPU's virtual offset Oliver Upton
2021-08-19 9:11 ` Marc Zyngier
2021-08-19 10:20 ` Andrew Jones
2021-08-29 2:35 ` Oliver Upton
2021-09-06 9:02 ` Marc Zyngier
2021-08-16 0:12 ` Oliver Upton [this message]
2021-08-16 0:12 ` [PATCH v7 5/7] KVM: arm64: Allow userspace to configure a guest's counter-timer offset Oliver Upton
2021-08-19 9:52 ` Marc Zyngier
2021-08-16 0:12 ` [PATCH v7 6/7] KVM: arm64: Configure timer traps in vcpu_load() for VHE Oliver Upton
2021-08-16 0:12 ` [PATCH v7 7/7] KVM: arm64: Emulate physical counter offsetting on non-ECV systems Oliver Upton
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