From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8DCEC433FE for ; Fri, 24 Sep 2021 08:26:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B8D876124C for ; Fri, 24 Sep 2021 08:26:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244726AbhIXI1d (ORCPT ); Fri, 24 Sep 2021 04:27:33 -0400 Received: from mail.kernel.org ([198.145.29.99]:34388 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244739AbhIXI10 (ORCPT ); Fri, 24 Sep 2021 04:27:26 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DAABB6124C; Fri, 24 Sep 2021 08:25:53 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mTgWm-00ChmL-8w; Fri, 24 Sep 2021 09:25:52 +0100 From: Marc Zyngier To: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: James Morse , Suzuki K Poulose , Alexandru Elisei , Eric Auger , Christoffer Dall , kernel-team@android.com Subject: [PATCH 4/5] KVM: arm64: vgic-v3: Don't propagate LPI active state from LRs into the distributor Date: Fri, 24 Sep 2021 09:25:41 +0100 Message-Id: <20210924082542.2766170-5-maz@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210924082542.2766170-1-maz@kernel.org> References: <20210924082542.2766170-1-maz@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, suzuki.poulose@arm.com, alexandru.elisei@arm.com, eric.auger@redhat.com, christoffer.dall@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Christoffer reported that while LPIs to not have an active state, the pseudocode for the vGIC clearly indicates that LPIs injected in the LRs do transition via an active state just like any other interrupt, and that it is only at the priority drop stage that the active state gets cleared. This is probably done for the sake of simplicity in the HW, and to trip every single SW developer. So as it turns out, we can observe an active LPI if the guest exits between the read of IAR and the write to EOI. This isn't a big deal and nothing breaks (the active LPI is made inactive on the next EOI). However, this active LPI will occupy a LR at the next entry, which is pointless. We could instead ignore this active state and keep the distributor blissfully unaware of this oddity. Just do that. Reported-by: Christoffer Dall Signed-off-by: Marc Zyngier --- arch/arm64/kvm/vgic/vgic-v3.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kvm/vgic/vgic-v3.c b/arch/arm64/kvm/vgic/vgic-v3.c index ae59e2580bf5..d281c6a533ee 100644 --- a/arch/arm64/kvm/vgic/vgic-v3.c +++ b/arch/arm64/kvm/vgic/vgic-v3.c @@ -69,9 +69,10 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) raw_spin_lock(&irq->irq_lock); - /* Always preserve the active bit, note deactivation */ + /* Preserve the active bit for non-LPI, note deactivation */ deactivated = irq->active && !(val & ICH_LR_ACTIVE_BIT); irq->active = !!(val & ICH_LR_ACTIVE_BIT); + irq->active &= irq->intid <= VGIC_MAX_SPI; if (irq->active && is_v2_sgi) irq->active_source = cpuid; -- 2.30.2