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Wed, 27 Oct 2021 09:58:28 +0000 From: Yishai Hadas To: , , , CC: , , , , , , , , Subject: [PATCH V5 mlx5-next 12/13] vfio/pci: Expose vfio_pci_core_aer_err_detected() Date: Wed, 27 Oct 2021 12:56:57 +0300 Message-ID: <20211027095658.144468-13-yishaih@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20211027095658.144468-1-yishaih@nvidia.com> References: <20211027095658.144468-1-yishaih@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7534a1ba-2801-4e8d-b8e4-08d999305601 X-MS-TrafficTypeDiagnostic: BN8PR12MB3250: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3968; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qBzf0zSL4VMbtTg62aYY35XlOxgI8vmHuG0hKmHwIYo2VxUC4Dw/acpYK27lPIsU5YxnUK5kN58TNpxzu7mSqeP05Mvu0nAtAeIhbCXu94+q2FHyVU8dEW+hanRWjsMh46zt1FQ0ViTB5FlG0NTgpA2ll69fVeZisCrM1eqL/bxvBqlSAoe6YuC3yNxF4wCHSBTKc623ERbb8x1UE+AI89r40SQmrR47l3TWOSfZViHHhEwvmqWWOZ+G75xAyFxTxUkxtzblOgbL988Q16n2SSpzquMPvAMe4bFNG8GsEoDaQdV1HcJMLfcyh1r4MFdjLcpIZjZGL2ZZeK2vuvjr71WaUBEozilmR3XPIo4ue94tAhnBuUtPcusnrgAQJqhKQuZuhp/GUL2xrpeqKuDJ0LIWtj56gqdJYMYpVeB0RGJXR/H/eh3rlyJ985GXrX6BroeykE+Zp/KNXpoVVxLxicgsA96tWLKWJ1k1DNxx4ChkcC80Cdl0EyfPWvCknH6OjQjVOjcsP7M+G5MEpmXiXBOpT9gzlyVzyHpUyY4WU1E7QXIkZ/r8ybZ3ZqEyccMRa2tVN/NKlb8nQkF5ANV3j5Q2O0Y9hhlsvbA9j59PVLs4/kxJ0hQMfkvqrU+P4opacLl9fsDK6Gsj4X3KZj5qG4ZOaDNbSSKrOdMDGVgJvaZqv7Ay7YBwNW8BX5uZ6mIzR6FQmUKvS4XY8Z91tOeNyQ== X-Forefront-Antispam-Report: CIP:216.228.112.32;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:schybrid01.nvidia.com;CAT:NONE;SFS:(4636009)(46966006)(36840700001)(26005)(82310400003)(54906003)(8936002)(83380400001)(426003)(36860700001)(110136005)(4326008)(36756003)(70206006)(186003)(6666004)(508600001)(6636002)(107886003)(316002)(86362001)(2906002)(1076003)(356005)(47076005)(2616005)(70586007)(7696005)(5660300002)(8676002)(336012)(7636003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2021 09:58:32.8010 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7534a1ba-2801-4e8d-b8e4-08d999305601 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.32];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT011.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3250 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Expose vfio_pci_core_aer_err_detected() to be used by drivers as part of their pci_error_handlers structure. Next patch for mlx5 driver will use it. Signed-off-by: Yishai Hadas --- drivers/vfio/pci/vfio_pci_core.c | 7 ++++--- include/linux/vfio_pci_core.h | 2 ++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index e581a327f90d..80e08e17d027 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -1901,8 +1901,8 @@ void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev) } EXPORT_SYMBOL_GPL(vfio_pci_core_unregister_device); -static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev, - pci_channel_state_t state) +pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev, + pci_channel_state_t state) { struct vfio_pci_core_device *vdev; struct vfio_device *device; @@ -1924,6 +1924,7 @@ static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev, return PCI_ERS_RESULT_CAN_RECOVER; } +EXPORT_SYMBOL_GPL(vfio_pci_core_aer_err_detected); int vfio_pci_core_sriov_configure(struct pci_dev *pdev, int nr_virtfn) { @@ -1946,7 +1947,7 @@ int vfio_pci_core_sriov_configure(struct pci_dev *pdev, int nr_virtfn) EXPORT_SYMBOL_GPL(vfio_pci_core_sriov_configure); const struct pci_error_handlers vfio_pci_core_err_handlers = { - .error_detected = vfio_pci_aer_err_detected, + .error_detected = vfio_pci_core_aer_err_detected, }; EXPORT_SYMBOL_GPL(vfio_pci_core_err_handlers); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index ef9a44b6cf5d..6bde57780311 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -230,6 +230,8 @@ int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf); int vfio_pci_core_enable(struct vfio_pci_core_device *vdev); void vfio_pci_core_disable(struct vfio_pci_core_device *vdev); void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev); +pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev, + pci_channel_state_t state); static inline bool vfio_pci_is_vga(struct pci_dev *pdev) { -- 2.18.1