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David Alan Gilbert" , , , Subject: Re: [PATCH v8 01/40] x86/compressed/64: detect/setup SEV/SME features earlier in boot Message-ID: <20211215175148.rtgyyqgymouvs7ft@amd.com> References: <20211210154332.11526-1-brijesh.singh@amd.com> <20211210154332.11526-2-brijesh.singh@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a5af497e-5be6-485b-dfeb-08d9bff3a8dc X-MS-TrafficTypeDiagnostic: BL1PR12MB5096:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5516; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 6vj+CmqGPoS+IdnKq808awTf2W+Hrxu1M2OkzJ89l8nvHbekLGX2gwjb8lS09T0EpPwDT0MrENCuXBhr1bAuaZx8KVje0OU5uG5qhcw4Dzuw3PuywuyQmp5T/p8xwLoQg5MRWblWv9E4ZR2Wp33xUa6DFE0PWG1pcYrNdfiJItf/+OShuYbneAVDneNmeGi3VUemhLxp2puaNPJYTDXRgAhn7hAzvowzz1+CKWWn3aHiVLaXz8OhO9fht2er3mF1ANIMHLSlucMLI8GI3S2eb41JLBk+6W9wQx/wHeA5n+jbRCxHuTZj6o4i/lkjPE+EPSdqiYni2zlxDpGUd75zUJkRQb/gUfSsyRBgmLVJYLFK5wR+QTm4NbDjyQsJvTDKv6xCiU53zer4qsgnfUYn5i07AyKU+zwfsO3Yfz6ZVGM5vKzvCB5IuqJ2ujULBX7jli7bIlgMessuDtweXFihmFv4IBOODrSulfZppMHDMkMsXjniHDC6Bj5Sn7rs1Huaz2qJ7oETQ4k1rh+MPZX/TATlVAhN5eI/mfW9iOczeHcYZOSqNXVIaR3Vxw3SGJmFSJeIKxUJ+eVFoP39NUl/rtXvBprfZ/b/lmPZqXrtMAa8WRhadQv2NeX1FpnzuGAeqhsBeVM2G66A/Bs0BVISbXpsr5WFCZH1e3eNbz5u5Rkxi6jIXvDVCZSZ4BkqauW1I+RwazX296MvHNgVRzvQeo20HOoHV6ErVtxlE4vWWkTVuwsmtinL7kZUOn0yTUgLhnZzylgT60HfgshZ22yJyb3Ap/szCsdyvw2rKNY49fIgiFbVMOZyANq+utZZJjlK8W+bYHSjo2vxMfZq6JOtBBfpllDNu425/JYoYqKGvofQYjxQv3D3hZQgJhwXMV5d X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(36840700001)(46966006)(40470700001)(47076005)(82310400004)(8676002)(4326008)(7416002)(5660300002)(7406005)(356005)(8936002)(40460700001)(36860700001)(81166007)(70206006)(2616005)(26005)(6666004)(1076003)(6916009)(36756003)(16526019)(70586007)(45080400002)(508600001)(336012)(186003)(44832011)(53546011)(316002)(2906002)(4001150100001)(86362001)(54906003)(426003)(966005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Dec 2021 17:52:27.9704 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a5af497e-5be6-485b-dfeb-08d9bff3a8dc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT056.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5096 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Tue, Dec 14, 2021 at 06:14:34PM -0600, Venu Busireddy wrote: > On 2021-12-14 20:10:16 +0100, Borislav Petkov wrote: > > On Tue, Dec 14, 2021 at 11:46:14AM -0600, Venu Busireddy wrote: > > > What I am suggesting should not have anything to do with the boot stage > > > of the kernel. > > > > I know exactly what you're suggesting. > > > > > For example, both these functions call native_cpuid(), which is declared > > > as an inline function. I am merely suggesting to do something similar > > > to avoid the code duplication. > > > > Try it yourself. If you can come up with something halfway readable and > > it builds, I'm willing to take a look. > > Patch (to be applied on top of sev-snp-v8 branch of > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2FAMDESE%2Flinux.git&data=04%7C01%7Cmichael.roth%40amd.com%7Cbff83ee03b1147c39ea808d9bf5fe9d8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637751240979543818%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=DZpgEtthswLhhfWqZlLkHHd5nJW2jb%2FVFuTssAFJ6Uo%3D&reserved=0) is attached at the end. > > Here are a few things I did. > > 1. Moved all the common code that existed at the begining of > sme_enable() and sev_enable() to an inline function named > get_pagetable_bit_pos(). > 2. sme_enable() was using AMD_SME_BIT and AMD_SEV_BIT, whereas > sev_enable() was dealing with raw bits. Moved those definitions to > sev.h, and changed sev_enable() to use those definitions. > 3. Make consistent use of BIT_ULL. Hi Venu, I know there's still comments floating around, but once there's consensus feel free to respond with a separate precursor patch against tip which moves sme_enable() cpuid code into your helper function, along with your S-o-B, and I can include it directly in the next version. Otherwise, I can incorporate your suggestions into the next spin, just let me know if it's okay to add: Co-authored-by: Venu Busireddy Signed-off-by: Venu Busireddy to the relevant commits. Thank you (and Boris/Tom) for the suggestions! -Mike > > Venu >