From: Venkatesh Srinivas <venkateshs@chromium.org>
To: kvm@vger.kernel.org
Cc: seanjc@google.com, marcorr@google.com, venkateshs@chromium.org
Subject: [PATCH v2 1/2] KVM: Inject #GP on invalid write to APIC_SELF_IPI register
Date: Wed, 25 May 2022 17:39:32 +0000 [thread overview]
Message-ID: <20220525173933.1611076-1-venkateshs@chromium.org> (raw)
From: Marc Orr <marcorr@google.com>
From: Venkatesh Srinivas <venkateshs@chromium.org>
The upper bytes of the x2APIC APIC_SELF_IPI register are reserved.
Inject a #GP into the guest if any of these reserved bits are set.
Signed-off-by: Marc Orr <marcorr@google.com>
Signed-off-by: Venkatesh Srinivas <venkateshs@chromium.org>
---
arch/x86/kvm/lapic.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 21ab69db689b..6f8522e8c492 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -2169,10 +2169,16 @@ static int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
break;
case APIC_SELF_IPI:
- if (apic_x2apic_mode(apic))
- kvm_apic_send_ipi(apic, APIC_DEST_SELF | (val & APIC_VECTOR_MASK), 0);
- else
+ /*
+ * Self-IPI exists only when x2APIC is enabled. Bits 7:0 hold
+ * the vector, everything else is reserved.
+ */
+ if (!apic_x2apic_mode(apic) || (val & ~APIC_VECTOR_MASK)) {
ret = 1;
+ break;
+ }
+ kvm_lapic_reg_write(apic, APIC_ICR,
+ APIC_DEST_SELF | (val & APIC_VECTOR_MASK));
break;
default:
ret = 1;
--
2.36.1.124.g0e6072fb45-goog
next reply other threads:[~2022-05-25 17:39 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-25 17:39 Venkatesh Srinivas [this message]
2022-05-25 17:39 ` [PATCH v2 2/2] KVM: Inject #GP on invalid writes to x2APIC registers Venkatesh Srinivas
2022-05-25 18:30 ` Sean Christopherson
2022-05-25 18:42 ` [PATCH v2 1/2] KVM: Inject #GP on invalid write to APIC_SELF_IPI register Sean Christopherson
2022-09-14 21:46 ` Jim Mattson
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