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From: Yuan Yao <yuan.yao@linux.intel.com>
To: isaku.yamahata@intel.com
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	isaku.yamahata@gmail.com, Paolo Bonzini <pbonzini@redhat.com>,
	erdemaktas@google.com, Sean Christopherson <seanjc@google.com>,
	Sagi Shahar <sagis@google.com>
Subject: Re: [PATCH v8 023/103] KVM: TDX: initialize VM with TDX specific parameters
Date: Wed, 31 Aug 2022 13:51:10 +0800	[thread overview]
Message-ID: <20220831055110.2ev4wvpptkywijfe@yy-desk-7060> (raw)
In-Reply-To: <031bea8db0c579b4866a33faeb85ce4d461dc8a3.1659854790.git.isaku.yamahata@intel.com>

On Sun, Aug 07, 2022 at 03:01:08PM -0700, isaku.yamahata@intel.com wrote:
> From: Xiaoyao Li <xiaoyao.li@intel.com>
>
> TDX requires additional parameters for TDX VM for confidential execution to
> protect its confidentiality of its memory contents and its CPU state from
> any other software, including VMM. When creating guest TD VM before
> creating vcpu, the number of vcpu, TSC frequency (that is same among
> vcpus. and it can't be changed.)  CPUIDs which is emulated by the TDX
> module. It means guest can trust those CPUIDs. and sha384 values for
> measurement.
>
> Add new subcommand, KVM_TDX_INIT_VM, to pass parameters for TDX guest.  It
> assigns encryption key to the TDX guest for memory encryption.  TDX

This paragraph talks about the parameters carried with KVM_TDX_INIT_VM,
but the encryption key is not part of them, suggest to move the encryption
related things to solo paragraph or just remove them.

> encrypts memory per-guest bases.  It assigns device model passes per-VM
> parameters for the TDX guest.  The maximum number of vcpus, tsc frequency
> (TDX guest has fised VM-wide TSC frequency. not per-vcpu.  The TDX guest
> can not change it.), attributes (production or debug), available extended
> features (which is reflected into guest XCR0, IA32_XSS MSR), cpuids, sha384
> measurements, and etc.
>
> This subcommand is called before creating vcpu and KVM_SET_CPUID2, i.e.
> cpuids configurations aren't available yet.  So CPUIDs configuration values
> needs to be passed in struct kvm_init_vm.  It's device model responsibility

s/kvm_init_vm/kvm_tdx_init_vm OR:
"So CPUIDs configuration values need to be passed with KVM_TDX_INIT_VM"

> to make this cpuid config for KVM_TDX_INIT_VM and KVM_SET_CPUID2.
>
> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> ---
>  arch/x86/include/asm/tdx.h            |   3 +
>  arch/x86/include/uapi/asm/kvm.h       |  33 +++++
>  arch/x86/kvm/vmx/tdx.c                | 199 ++++++++++++++++++++++++++
>  arch/x86/kvm/vmx/tdx.h                |  22 +++
>  tools/arch/x86/include/uapi/asm/kvm.h |  33 +++++
>  5 files changed, 290 insertions(+)
>
> diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h
> index a32e8881e758..8a1905ae3ad6 100644
> --- a/arch/x86/include/asm/tdx.h
> +++ b/arch/x86/include/asm/tdx.h
> @@ -89,6 +89,9 @@ static inline long tdx_kvm_hypercall(unsigned int nr, unsigned long p1,
>  #endif /* CONFIG_INTEL_TDX_GUEST && CONFIG_KVM_GUEST */
>
>  #ifdef CONFIG_INTEL_TDX_HOST
> +
> +/* -1 indicates CPUID leaf with no sub-leaves. */
> +#define TDX_CPUID_NO_SUBLEAF	((u32)-1)
>  struct tdx_cpuid_config {
>  	u32	leaf;
>  	u32	sub_leaf;
> diff --git a/arch/x86/include/uapi/asm/kvm.h b/arch/x86/include/uapi/asm/kvm.h
> index 9effc64e547e..97ce34d746af 100644
> --- a/arch/x86/include/uapi/asm/kvm.h
> +++ b/arch/x86/include/uapi/asm/kvm.h
> @@ -538,6 +538,7 @@ struct kvm_pmu_event_filter {
>  /* Trust Domain eXtension sub-ioctl() commands. */
>  enum kvm_tdx_cmd_id {
>  	KVM_TDX_CAPABILITIES = 0,
> +	KVM_TDX_INIT_VM,
>
>  	KVM_TDX_CMD_NR_MAX,
>  };
> @@ -583,4 +584,36 @@ struct kvm_tdx_capabilities {
>  	struct kvm_tdx_cpuid_config cpuid_configs[0];
>  };
>
> +struct kvm_tdx_init_vm {
> +	__u64 attributes;
> +	__u32 max_vcpus;
> +	__u32 padding;
> +	__u64 mrconfigid[6];	/* sha384 digest */
> +	__u64 mrowner[6];	/* sha384 digest */
> +	__u64 mrownerconfig[6];	/* sha348 digest */
> +	union {
> +		/*
> +		 * KVM_TDX_INIT_VM is called before vcpu creation, thus before
> +		 * KVM_SET_CPUID2.  CPUID configurations needs to be passed.
> +		 *
> +		 * This configuration supersedes KVM_SET_CPUID{,2}.
> +		 * The user space VMM, e.g. qemu, should make them consistent
> +		 * with this values.
> +		 * sizeof(struct kvm_cpuid_entry2) * KVM_MAX_CPUID_ENTRIES(256)
> +		 * = 8KB.
> +		 */
> +		struct {
> +			struct kvm_cpuid2 cpuid;
> +			/* 8KB with KVM_MAX_CPUID_ENTRIES. */
> +			struct kvm_cpuid_entry2 entries[];
> +		};
> +		/*
> +		 * For future extensibility.
> +		 * The size(struct kvm_tdx_init_vm) = 16KB.
> +		 * This should be enough given sizeof(TD_PARAMS) = 1024

Do you mean that in TD_PARAMS now maximum CPUID item count is 48 (1024
- CPUID ITEM START(is 256)) / CPUID size(is 16)) and here we already
defined 256 which is much enough for TD_PARAMS ?

> +		 */
> +		__u64 reserved[2028];
> +	};
> +};
> +
>  #endif /* _ASM_X86_KVM_H */
> diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c
> index d3b9f653da4b..dcd2f460275e 100644
> --- a/arch/x86/kvm/vmx/tdx.c
> +++ b/arch/x86/kvm/vmx/tdx.c
> @@ -424,6 +424,202 @@ int tdx_dev_ioctl(void __user *argp)
>  	return 0;
>  }
>
> +/*
> + * cpuid entry lookup in TDX cpuid config way.
> + * The difference is how to specify index(subleaves).
> + * Specify index to TDX_CPUID_NO_SUBLEAF for CPUID leaf with no-subleaves.
> + */
> +static const struct kvm_cpuid_entry2 *tdx_find_cpuid_entry(
> +	const struct kvm_cpuid2 *cpuid, u32 function, u32 index)
> +{
> +	int i;
> +
> +	/* In TDX CPU CONFIG, TDX_CPUID_NO_SUBLEAF means index = 0. */
> +	if (index == TDX_CPUID_NO_SUBLEAF)
> +		index = 0;
> +
> +	for (i = 0; i < cpuid->nent; i++) {
> +		const struct kvm_cpuid_entry2 *e = &cpuid->entries[i];
> +
> +		if (e->function == function &&
> +		    (e->index == index ||
> +		     !(e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX)))
> +			return e;
> +	}
> +	return NULL;
> +}
> +
> +static int setup_tdparams(struct kvm *kvm, struct td_params *td_params,
> +			struct kvm_tdx_init_vm *init_vm)
> +{
> +	const struct kvm_cpuid2 *cpuid = &init_vm->cpuid;
> +	const struct kvm_cpuid_entry2 *entry;
> +	u64 guest_supported_xcr0;
> +	u64 guest_supported_xss;
> +	int max_pa;
> +	int i;
> +
> +	td_params->max_vcpus = init_vm->max_vcpus;
> +
> +	td_params->attributes = init_vm->attributes;
> +	if (td_params->attributes & TDX_TD_ATTRIBUTE_PERFMON) {
> +		/*
> +		 * TODO: save/restore PMU related registers around TDENTER.
> +		 * Once it's done, remove this guard.
> +		 */
> +		pr_warn("TD doesn't support perfmon yet. KVM needs to save/restore "
> +			"host perf registers properly.\n");
> +		return -EOPNOTSUPP;
> +	}
> +
> +	for (i = 0; i < tdx_caps.nr_cpuid_configs; i++) {
> +		const struct tdx_cpuid_config *config = &tdx_caps.cpuid_configs[i];
> +		const struct kvm_cpuid_entry2 *entry =
> +			tdx_find_cpuid_entry(cpuid, config->leaf, config->sub_leaf);
> +		struct tdx_cpuid_value *value = &td_params->cpuid_values[i];
> +
> +		if (!entry)
> +			continue;

So the corresponding CPUID's configurable bits are all set to 0 if
user space doesn't pass it down, a pr_warn() is needed here if this
isn't the expected case.

> +
> +		value->eax = entry->eax & config->eax;
> +		value->ebx = entry->ebx & config->ebx;
> +		value->ecx = entry->ecx & config->ecx;
> +		value->edx = entry->edx & config->edx;
> +	}
> +
> +	max_pa = 36;
> +	entry = tdx_find_cpuid_entry(cpuid, 0x80000008, 0);
> +	if (entry)
> +		max_pa = entry->eax & 0xff;
> +
> +	td_params->eptp_controls = VMX_EPTP_MT_WB;
> +	/*
> +	 * No CPU supports 4-level && max_pa > 48.
> +	 * "5-level paging and 5-level EPT" section 4.1 4-level EPT
> +	 * "4-level EPT is limited to translating 48-bit guest-physical
> +	 *  addresses."
> +	 * cpu_has_vmx_ept_5levels() check is just in case.
> +	 */
> +	if (cpu_has_vmx_ept_5levels() && max_pa > 48) {
> +		td_params->eptp_controls |= VMX_EPTP_PWL_5;
> +		td_params->exec_controls |= TDX_EXEC_CONTROL_MAX_GPAW;
> +	} else {
> +		td_params->eptp_controls |= VMX_EPTP_PWL_4;
> +	}
> +
> +	/* Setup td_params.xfam */
> +	entry = tdx_find_cpuid_entry(cpuid, 0xd, 0);
> +	if (entry)
> +		guest_supported_xcr0 = (entry->eax | ((u64)entry->edx << 32));
> +	else
> +		guest_supported_xcr0 = 0;
> +	guest_supported_xcr0 &= kvm_caps.supported_xcr0;
> +
> +	entry = tdx_find_cpuid_entry(cpuid, 0xd, 1);
> +	if (entry)
> +		guest_supported_xss = (entry->ecx | ((u64)entry->edx << 32));
> +	else
> +		guest_supported_xss = 0;
> +	/* PT can be exposed to TD guest regardless of KVM's XSS support */
> +	guest_supported_xss &= (kvm_caps.supported_xss | XFEATURE_MASK_PT);
> +
> +	td_params->xfam = guest_supported_xcr0 | guest_supported_xss;
> +	if (td_params->xfam & XFEATURE_MASK_LBR) {
> +		/*
> +		 * TODO: once KVM supports LBR(save/restore LBR related
> +		 * registers around TDENTER), remove this guard.
> +		 */
> +		pr_warn("TD doesn't support LBR yet. KVM needs to save/restore "
> +			"IA32_LBR_DEPTH properly.\n");
> +		return -EOPNOTSUPP;
> +	}
> +
> +	if (td_params->xfam & XFEATURE_MASK_XTILE) {
> +		/*
> +		 * TODO: once KVM supports AMX(save/restore AMX related
> +		 * registers around TDENTER), remove this guard.
> +		 */
> +		pr_warn("TD doesn't support AMX yet. KVM needs to save/restore "
> +			"IA32_XFD, IA32_XFD_ERR properly.\n");
> +		return -EOPNOTSUPP;
> +	}
> +
> +	td_params->tsc_frequency =
> +		TDX_TSC_KHZ_TO_25MHZ(kvm->arch.default_tsc_khz);
> +
> +#define MEMCPY_SAME_SIZE(dst, src)				\
> +	do {							\
> +		BUILD_BUG_ON(sizeof(dst) != sizeof(src));	\
> +		memcpy((dst), (src), sizeof(dst));		\
> +	} while (0)
> +
> +	MEMCPY_SAME_SIZE(td_params->mrconfigid, init_vm->mrconfigid);
> +	MEMCPY_SAME_SIZE(td_params->mrowner, init_vm->mrowner);
> +	MEMCPY_SAME_SIZE(td_params->mrownerconfig, init_vm->mrownerconfig);
> +
> +	return 0;
> +}
> +
> +static int tdx_td_init(struct kvm *kvm, struct kvm_tdx_cmd *cmd)
> +{
> +	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);
> +	struct kvm_tdx_init_vm *init_vm = NULL;
> +	struct td_params *td_params = NULL;
> +	struct tdx_module_output out;
> +	int ret;
> +	u64 err;
> +
> +	BUILD_BUG_ON(sizeof(*init_vm) != 16 * 1024);
> +	BUILD_BUG_ON((sizeof(*init_vm) - offsetof(typeof(*init_vm), entries)) /
> +		     sizeof(init_vm->entries[0]) < KVM_MAX_CPUID_ENTRIES);
> +	BUILD_BUG_ON(sizeof(struct td_params) != 1024);
> +
> +	if (is_td_initialized(kvm))
> +		return -EINVAL;
> +
> +	if (cmd->flags)
> +		return -EINVAL;
> +
> +	init_vm = kzalloc(sizeof(*init_vm), GFP_KERNEL);
> +	if (copy_from_user(init_vm, (void __user *)cmd->data, sizeof(*init_vm))) {
> +		ret = -EFAULT;
> +		goto out;
> +	}
> +
> +	if (init_vm->max_vcpus > KVM_MAX_VCPUS) {
> +		ret = -EINVAL;
> +		goto out;
> +	}
> +
> +	td_params = kzalloc(sizeof(struct td_params), GFP_KERNEL);
> +	if (!td_params) {
> +		ret = -ENOMEM;
> +		goto out;
> +	}
> +
> +	ret = setup_tdparams(kvm, td_params, init_vm);
> +	if (ret)
> +		goto out;
> +
> +	err = tdh_mng_init(kvm_tdx->tdr.pa, __pa(td_params), &out);
> +	if (WARN_ON_ONCE(err)) {
> +		pr_tdx_error(TDH_MNG_INIT, err, &out);
> +		ret = -EIO;
> +		goto out;
> +	}
> +
> +	kvm_tdx->tsc_offset = td_tdcs_exec_read64(kvm_tdx, TD_TDCS_EXEC_TSC_OFFSET);
> +	kvm_tdx->attributes = td_params->attributes;
> +	kvm_tdx->xfam = td_params->xfam;
> +	kvm->max_vcpus = td_params->max_vcpus;
> +
> +out:
> +	/* kfree() accepts NULL. */
> +	kfree(init_vm);
> +	kfree(td_params);
> +	return ret;
> +}
> +
>  int tdx_vm_ioctl(struct kvm *kvm, void __user *argp)
>  {
>  	struct kvm_tdx_cmd tdx_cmd;
> @@ -437,6 +633,9 @@ int tdx_vm_ioctl(struct kvm *kvm, void __user *argp)
>  	mutex_lock(&kvm->lock);
>
>  	switch (tdx_cmd.id) {
> +	case KVM_TDX_INIT_VM:
> +		r = tdx_td_init(kvm, &tdx_cmd);
> +		break;
>  	default:
>  		r = -EINVAL;
>  		goto out;
> diff --git a/arch/x86/kvm/vmx/tdx.h b/arch/x86/kvm/vmx/tdx.h
> index 8058b6b153f8..3e5782438dc9 100644
> --- a/arch/x86/kvm/vmx/tdx.h
> +++ b/arch/x86/kvm/vmx/tdx.h
> @@ -20,7 +20,11 @@ struct kvm_tdx {
>  	struct tdx_td_page tdr;
>  	struct tdx_td_page *tdcs;
>
> +	u64 attributes;
> +	u64 xfam;
>  	int hkid;
> +
> +	u64 tsc_offset;
>  };
>
>  struct vcpu_tdx {
> @@ -50,6 +54,11 @@ static inline struct vcpu_tdx *to_tdx(struct kvm_vcpu *vcpu)
>  	return container_of(vcpu, struct vcpu_tdx, vcpu);
>  }
>
> +static inline bool is_td_initialized(struct kvm *kvm)
> +{
> +	return !!kvm->max_vcpus;
> +}
> +
>  static __always_inline void tdvps_vmcs_check(u32 field, u8 bits)
>  {
>  	BUILD_BUG_ON_MSG(__builtin_constant_p(field) && (field) & 0x1,
> @@ -135,6 +144,19 @@ TDX_BUILD_TDVPS_ACCESSORS(64, VMCS, vmcs);
>  TDX_BUILD_TDVPS_ACCESSORS(64, STATE_NON_ARCH, state_non_arch);
>  TDX_BUILD_TDVPS_ACCESSORS(8, MANAGEMENT, management);
>
> +static __always_inline u64 td_tdcs_exec_read64(struct kvm_tdx *kvm_tdx, u32 field)
> +{
> +	struct tdx_module_output out;
> +	u64 err;
> +
> +	err = tdh_mng_rd(kvm_tdx->tdr.pa, TDCS_EXEC(field), &out);
> +	if (unlikely(err)) {
> +		pr_err("TDH_MNG_RD[EXEC.0x%x] failed: 0x%llx\n", field, err);
> +		return 0;
> +	}
> +	return out.r8;
> +}
> +
>  #else
>  static inline int tdx_module_setup(void) { return -ENODEV; };
>
> diff --git a/tools/arch/x86/include/uapi/asm/kvm.h b/tools/arch/x86/include/uapi/asm/kvm.h
> index ca85a070ac19..965a1c2e347d 100644
> --- a/tools/arch/x86/include/uapi/asm/kvm.h
> +++ b/tools/arch/x86/include/uapi/asm/kvm.h
> @@ -532,6 +532,7 @@ struct kvm_pmu_event_filter {
>  /* Trust Domain eXtension sub-ioctl() commands. */
>  enum kvm_tdx_cmd_id {
>  	KVM_TDX_CAPABILITIES = 0,
> +	KVM_TDX_INIT_VM,
>
>  	KVM_TDX_CMD_NR_MAX,
>  };
> @@ -577,4 +578,36 @@ struct kvm_tdx_capabilities {
>  	struct kvm_tdx_cpuid_config cpuid_configs[0];
>  };
>
> +struct kvm_tdx_init_vm {
> +	__u64 attributes;
> +	__u32 max_vcpus;
> +	__u32 padding;
> +	__u64 mrconfigid[6];    /* sha384 digest */
> +	__u64 mrowner[6];       /* sha384 digest */
> +	__u64 mrownerconfig[6]; /* sha348 digest */
> +	union {
> +		/*
> +		 * KVM_TDX_INIT_VM is called before vcpu creation, thus before
> +		 * KVM_SET_CPUID2.  CPUID configurations needs to be passed.
> +		 *
> +		 * This configuration supersedes KVM_SET_CPUID{,2}.
> +		 * The user space VMM, e.g. qemu, should make them consistent
> +		 * with this values.
> +		 * sizeof(struct kvm_cpuid_entry2) * KVM_MAX_CPUID_ENTRIES(256)
> +		 * = 8KB.
> +		 */
> +		struct {
> +			struct kvm_cpuid2 cpuid;
> +			/* 8KB with KVM_MAX_CPUID_ENTRIES. */
> +			struct kvm_cpuid_entry2 entries[];
> +		};
> +		/*
> +		 * For future extensibility.
> +		 * The size(struct kvm_tdx_init_vm) = 16KB.
> +		 * This should be enough given sizeof(TD_PARAMS) = 1024
> +		 */
> +		__u64 reserved[2028];
> +	};
> +};
> +
>  #endif /* _ASM_X86_KVM_H */
> --
> 2.25.1
>

  parent reply	other threads:[~2022-08-31  5:51 UTC|newest]

Thread overview: 165+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-07 22:00 [PATCH v8 000/103] KVM TDX basic feature support isaku.yamahata
2022-08-07 22:00 ` [PATCH v8 001/103] KVM: x86: Move check_processor_compatibility from init ops to runtime ops isaku.yamahata
2022-08-07 22:00 ` [PATCH v8 002/103] Partially revert "KVM: Pass kvm_init()'s opaque param to additional arch funcs" isaku.yamahata
2022-08-11  9:59   ` Huang, Kai
2022-08-25 19:48     ` Isaku Yamahata
2022-08-07 22:00 ` [PATCH v8 003/103] KVM: Refactor CPU compatibility check on module initialization isaku.yamahata
2022-08-09  7:16   ` Binbin Wu
2022-08-11 11:16   ` Huang, Kai
2022-08-11 17:39     ` Sean Christopherson
2022-08-12 11:35       ` Huang, Kai
2022-08-15 22:35         ` Sean Christopherson
2022-08-15 23:06           ` Huang, Kai
2022-08-23  5:27         ` Isaku Yamahata
2022-09-01  9:03       ` Marc Zyngier
2022-09-01 14:08         ` Sean Christopherson
2022-08-07 22:00 ` [PATCH v8 004/103] KVM: VMX: Move out vmx_x86_ops to 'main.c' to wrap VMX and TDX isaku.yamahata
2022-08-09  8:38   ` Binbin Wu
2022-08-11 11:38   ` Huang, Kai
2022-08-07 22:00 ` [PATCH v8 005/103] KVM: x86: Refactor KVM VMX module init/exit functions isaku.yamahata
2022-08-07 22:00 ` [PATCH v8 006/103] KVM: Enable hardware before doing arch VM initialization isaku.yamahata
2022-08-07 22:00 ` [PATCH v8 007/103] KVM: TDX: Add placeholders for TDX VM/vcpu structure isaku.yamahata
2022-08-07 22:00 ` [PATCH v8 008/103] x86/virt/tdx: Add a helper function to return system wide info about TDX module isaku.yamahata
2022-08-29  8:49   ` Yuan Yao
2022-08-07 22:00 ` [PATCH v8 009/103] KVM: TDX: Initialize the TDX module when loading the KVM intel kernel module isaku.yamahata
2022-08-08 10:41   ` Huang, Kai
2022-08-25 20:16     ` Isaku Yamahata
2022-08-10  8:18   ` Binbin Wu
2022-08-25 20:24     ` Isaku Yamahata
2022-08-07 22:00 ` [PATCH v8 010/103] KVM: x86: Introduce vm_type to differentiate default VMs from confidential VMs isaku.yamahata
2022-08-07 22:00 ` [PATCH v8 011/103] KVM: TDX: Make TDX VM type supported isaku.yamahata
2022-08-07 22:00 ` [PATCH v8 012/103] [MARKER] The start of TDX KVM patch series: TDX architectural definitions isaku.yamahata
2022-08-07 22:00 ` [PATCH v8 013/103] KVM: TDX: Define " isaku.yamahata
2022-08-11  3:15   ` Binbin Wu
2022-08-25 21:50     ` Isaku Yamahata
2022-08-07 22:00 ` [PATCH v8 014/103] KVM: TDX: Add TDX "architectural" error codes isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 015/103] KVM: TDX: Add C wrapper functions for SEAMCALLs to the TDX module isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 016/103] KVM: TDX: Add helper functions to print TDX SEAMCALL error isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 017/103] [MARKER] The start of TDX KVM patch series: TD VM creation/destruction isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 018/103] KVM: TDX: Stub in tdx.h with structs, accessors, and VMCS helpers isaku.yamahata
2022-08-23  3:39   ` Binbin Wu
2022-08-23 15:40     ` Sean Christopherson
2022-08-26  4:48       ` Isaku Yamahata
2022-08-30  6:51         ` Yuan Yao
2022-08-31  3:40         ` Xiaoyao Li
2022-08-26  6:24       ` Binbin Wu
2022-08-07 22:01 ` [PATCH v8 019/103] x86/cpu: Add helper functions to allocate/free TDX private host key id isaku.yamahata
2022-08-30  7:17   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 020/103] KVM: TDX: create/destroy VM structure isaku.yamahata
2022-08-24  0:53   ` Erdem Aktas
2022-08-26  6:44     ` Isaku Yamahata
2022-08-27  3:52   ` Binbin Wu
2022-08-29 19:09     ` Isaku Yamahata
2022-08-30  8:57       ` Binbin Wu
2022-08-30  9:26         ` Xiaoyao Li
2022-08-30 12:01   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 021/103] KVM: TDX: x86: Add ioctl to get TDX systemwide parameters isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 022/103] KVM: TDX: Add place holder for TDX VM specific mem_enc_op ioctl isaku.yamahata
2022-08-29  4:07   ` Binbin Wu
2022-08-29 19:17     ` Isaku Yamahata
2022-08-31  2:18   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 023/103] KVM: TDX: initialize VM with TDX specific parameters isaku.yamahata
2022-08-29  8:08   ` Binbin Wu
2022-08-31  5:51   ` Yuan Yao [this message]
2022-08-07 22:01 ` [PATCH v8 024/103] KVM: TDX: Make pmu_intel.c ignore guest TD case isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 025/103] [MARKER] The start of TDX KVM patch series: TD vcpu creation/destruction isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 026/103] KVM: TDX: allocate/free TDX vcpu structure isaku.yamahata
2022-08-30  3:20   ` Binbin Wu
2022-08-07 22:01 ` [PATCH v8 027/103] KVM: TDX: Do TDX specific vcpu initialization isaku.yamahata
2022-08-30  9:10   ` Binbin Wu
2022-08-07 22:01 ` [PATCH v8 028/103] [MARKER] The start of TDX KVM patch series: KVM MMU GPA shared bits isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 029/103] KVM: x86/mmu: introduce config for PRIVATE KVM MMU isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 030/103] KVM: x86/mmu: Add address conversion functions for TDX shared bit of GPA isaku.yamahata
2022-08-31  7:07   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 031/103] [MARKER] The start of TDX KVM patch series: KVM TDP refactoring for TDX isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 032/103] KVM: x86/mmu: Allow non-zero value for non-present SPTE isaku.yamahata
2022-08-09  2:56   ` Huang, Kai
2022-08-31  8:03   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 033/103] KVM: x86/mmu: Track shadow MMIO value/mask on a per-VM basis isaku.yamahata
2022-08-08 10:14   ` Huang, Kai
2022-09-01  5:54   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 034/103] KVM: x86/mmu: Disallow fast page fault on private GPA isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 035/103] KVM: x86/mmu: Allow per-VM override of the TDP max page level isaku.yamahata
2022-09-01  6:07   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 036/103] KVM: VMX: Introduce test mode related to EPT violation VE isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 037/103] [MARKER] The start of TDX KVM patch series: KVM TDP MMU hooks isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 038/103] KVM: x86/tdp_mmu: refactor kvm_tdp_mmu_map() isaku.yamahata
2022-09-01  6:48   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 039/103] KVM: x86/tdp_mmu: Init role member of struct kvm_mmu_page at allocation isaku.yamahata
2022-09-01  7:12   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 040/103] KVM: x86/mmu: Require TDP MMU for TDX isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 041/103] KVM: x86/mmu: Add a new is_private member for union kvm_mmu_page_role isaku.yamahata
2022-09-01  7:44   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 042/103] KVM: x86/mmu: Add a private pointer to struct kvm_mmu_page isaku.yamahata
2022-09-01  8:59   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 043/103] KVM: x86/tdp_mmu: Don't zap private pages for unsupported cases isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 044/103] KVM: x86/tdp_mmu: Support TDX private mapping for TDP MMU isaku.yamahata
2022-09-02  6:38   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 045/103] [MARKER] The start of TDX KVM patch series: TDX EPT violation isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 046/103] KVM: x86/mmu: Disallow dirty logging for x86 TDX isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 047/103] KVM: x86/tdp_mmu: Ignore unsupported mmu operation on private GFNs isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 048/103] KVM: VMX: Split out guts of EPT violation to common/exposed function isaku.yamahata
2022-09-02  7:05   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 049/103] KVM: VMX: Move setting of EPT MMU masks to common VT-x code isaku.yamahata
2022-09-02  7:23   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 050/103] KVM: TDX: Add load_mmu_pgd method for TDX isaku.yamahata
2022-09-02  7:27   ` Yuan Yao
2022-08-07 22:01 ` [PATCH v8 051/103] KVM: TDX: don't request KVM_REQ_APIC_PAGE_RELOAD isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 052/103] KVM: x86/VMX: introduce vmx tlb_remote_flush and tlb_remote_flush_with_range isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 053/103] KVM: TDX: TDP MMU TDX support isaku.yamahata
2022-08-16 15:35   ` Sean Christopherson
2022-08-16 23:04     ` Huang, Kai
2022-08-07 22:01 ` [PATCH v8 054/103] [MARKER] The start of TDX KVM patch series: KVM TDP MMU MapGPA isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 055/103] KVM: Add functions to track whether GFN is private or shared isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 056/103] KVM: x86/mmu: Let vcpu re-try when faulting page type conflict isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 057/103] KVM: x86/mmu: Introduce kvm_mmu_map_tdp_page() for use by TDX isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 058/103] KVM: x86/tdp_mmu: implement MapGPA hypercall for TDX isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 059/103] [MARKER] The start of TDX KVM patch series: TD finalization isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 060/103] KVM: TDX: Create initial guest memory isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 061/103] KVM: TDX: Finalize VM initialization isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 062/103] [MARKER] The start of TDX KVM patch series: TD vcpu enter/exit isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 063/103] KVM: TDX: Add helper assembly function to TDX vcpu isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 064/103] KVM: TDX: Implement TDX vcpu enter/exit path isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 065/103] KVM: TDX: vcpu_run: save/restore host state(host kernel gs) isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 066/103] KVM: TDX: restore host xsave state when exit from the guest TD isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 067/103] KVM: x86: Allow to update cached values in kvm_user_return_msrs w/o wrmsr isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 068/103] KVM: TDX: restore user ret MSRs isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 069/103] [MARKER] The start of TDX KVM patch series: TD vcpu exits/interrupts/hypercalls isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 070/103] KVM: TDX: complete interrupts after tdexit isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 071/103] KVM: TDX: restore debug store when TD exit isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 072/103] KVM: TDX: handle vcpu migration over logical processor isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 073/103] KVM: x86: Add a switch_db_regs flag to handle TDX's auto-switched behavior isaku.yamahata
2022-08-07 22:01 ` [PATCH v8 074/103] KVM: TDX: Add support for find pending IRQ in a protected local APIC isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 075/103] KVM: x86: Assume timer IRQ was injected if APIC state is proteced isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 076/103] KVM: TDX: remove use of struct vcpu_vmx from posted_interrupt.c isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 077/103] KVM: TDX: Implement interrupt injection isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 078/103] KVM: TDX: Implements vcpu request_immediate_exit isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 079/103] KVM: TDX: Implement methods to inject NMI isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 080/103] KVM: VMX: Modify NMI and INTR handlers to take intr_info as function argument isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 081/103] KVM: VMX: Move NMI/exception handler to common helper isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 082/103] KVM: x86: Split core of hypercall emulation to helper function isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 083/103] KVM: TDX: Add a place holder to handle TDX VM exit isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 084/103] KVM: TDX: Retry seamcall when TDX_OPERAND_BUSY with operand SEPT isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 085/103] KVM: TDX: handle EXIT_REASON_OTHER_SMI isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 086/103] KVM: TDX: handle ept violation/misconfig exit isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 087/103] KVM: TDX: handle EXCEPTION_NMI and EXTERNAL_INTERRUPT isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 088/103] KVM: TDX: Add a place holder for handler of TDX hypercalls (TDG.VP.VMCALL) isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 089/103] KVM: TDX: handle KVM hypercall with TDG.VP.VMCALL isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 090/103] KVM: TDX: Handle TDX PV CPUID hypercall isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 091/103] KVM: TDX: Handle TDX PV HLT hypercall isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 092/103] KVM: TDX: Handle TDX PV port io hypercall isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 093/103] KVM: TDX: Handle TDX PV MMIO hypercall isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 094/103] KVM: TDX: Implement callbacks for MSR operations for TDX isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 095/103] KVM: TDX: Handle TDX PV rdmsr/wrmsr hypercall isaku.yamahata
2022-08-17 22:40   ` Sagi Shahar
2022-08-26  6:46     ` Isaku Yamahata
2022-08-07 22:02 ` [PATCH v8 096/103] KVM: TDX: Handle TDX PV report fatal error hypercall isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 097/103] KVM: TDX: Handle TDX PV map_gpa hypercall isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 098/103] KVM: TDX: Handle TDG.VP.VMCALL<GetTdVmCallInfo> hypercall isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 099/103] KVM: TDX: Silently discard SMI request isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 100/103] KVM: TDX: Silently ignore INIT/SIPI isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 101/103] KVM: TDX: Add methods to ignore accesses to CPU state isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 102/103] Documentation/virt/kvm: Document on Trust Domain Extensions(TDX) isaku.yamahata
2022-08-07 22:02 ` [PATCH v8 103/103] KVM: x86: design documentation on TDX support of x86 KVM TDP MMU isaku.yamahata
2022-08-08  3:47 ` [PATCH v8 000/103] KVM TDX basic feature support Bagas Sanjaya
2022-08-08 20:44   ` Isaku Yamahata

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