From: Zhao Liu <zhao1.liu@intel.com>
To: "Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Eric Blake" <eblake@redhat.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>,
"Daniel P . Berrangé" <berrange@redhat.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
Zhenyu Wang <zhenyu.z.wang@intel.com>,
Zhuocheng Ding <zhuocheng.ding@intel.com>,
Babu Moger <babu.moger@amd.com>,
Xiaoyao Li <xiaoyao.li@intel.com>,
Dapeng Mi <dapeng1.mi@intel.com>,
Yongwei Ma <yongwei.ma@intel.com>, Zhao Liu <zhao1.liu@intel.com>
Subject: [PATCH v11 18/21] hw/i386/pc: Support smp.modules for x86 PC machine
Date: Wed, 24 Apr 2024 23:49:26 +0800 [thread overview]
Message-ID: <20240424154929.1487382-19-zhao1.liu@intel.com> (raw)
In-Reply-To: <20240424154929.1487382-1-zhao1.liu@intel.com>
As module-level topology support is added to X86CPU, now we can enable
the support for the modules parameter on PC machines. With this support,
we can define a 5-level x86 CPU topology with "-smp":
-smp cpus=*,maxcpus=*,sockets=*,dies=*,modules=*,cores=*,threads=*.
So, add the 5-level topology example in description of "-smp".
Additionally, add the missed drawers and books options in previous
example.
Tested-by: Yongwei Ma <yongwei.ma@intel.com>
Co-developed-by: Zhuocheng Ding <zhuocheng.ding@intel.com>
Signed-off-by: Zhuocheng Ding <zhuocheng.ding@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Tested-by: Babu Moger <babu.moger@amd.com>
Reviewed-by: Babu Moger <babu.moger@amd.com>
---
Changes since v9:
* Mentioned the change about adding missed drawers and books. (Babu)
Changes since v8:
* Added missing "modules" parameter in -smp example.
Changes since v7:
* Supported modules instead of clusters for PC.
* Dropped Michael/Babu/Yanan's ACKed/Tested/Reviewed tags since the
code change.
* Re-added Yongwei's Tested tag For his re-testing.
---
hw/i386/pc.c | 1 +
qemu-options.hx | 18 ++++++++++--------
2 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 08c7de416fda..6d2ad5d663d2 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1839,6 +1839,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
mc->nvdimm_supported = true;
mc->smp_props.dies_supported = true;
+ mc->smp_props.modules_supported = true;
mc->default_ram_id = "pc.ram";
pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_AUTO;
diff --git a/qemu-options.hx b/qemu-options.hx
index 8ce85d45598d..eddd3595c7b9 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -281,7 +281,8 @@ ERST
DEF("smp", HAS_ARG, QEMU_OPTION_smp,
"-smp [[cpus=]n][,maxcpus=maxcpus][,drawers=drawers][,books=books][,sockets=sockets]\n"
- " [,dies=dies][,clusters=clusters][,cores=cores][,threads=threads]\n"
+ " [,dies=dies][,clusters=clusters][,modules=modules][,cores=cores]\n"
+ " [,threads=threads]\n"
" set the number of initial CPUs to 'n' [default=1]\n"
" maxcpus= maximum number of total CPUs, including\n"
" offline CPUs for hotplug, etc\n"
@@ -290,7 +291,8 @@ DEF("smp", HAS_ARG, QEMU_OPTION_smp,
" sockets= number of sockets in one book\n"
" dies= number of dies in one socket\n"
" clusters= number of clusters in one die\n"
- " cores= number of cores in one cluster\n"
+ " modules= number of modules in one cluster\n"
+ " cores= number of cores in one module\n"
" threads= number of threads in one core\n"
"Note: Different machines may have different subsets of the CPU topology\n"
" parameters supported, so the actual meaning of the supported parameters\n"
@@ -306,7 +308,7 @@ DEF("smp", HAS_ARG, QEMU_OPTION_smp,
" must be set as 1 in the purpose of correct parsing.\n",
QEMU_ARCH_ALL)
SRST
-``-smp [[cpus=]n][,maxcpus=maxcpus][,sockets=sockets][,dies=dies][,clusters=clusters][,cores=cores][,threads=threads]``
+``-smp [[cpus=]n][,maxcpus=maxcpus][,drawers=drawers][,books=books][,sockets=sockets][,dies=dies][,clusters=clusters][,modules=modules][,cores=cores][,threads=threads]``
Simulate a SMP system with '\ ``n``\ ' CPUs initially present on
the machine type board. On boards supporting CPU hotplug, the optional
'\ ``maxcpus``\ ' parameter can be set to enable further CPUs to be
@@ -345,14 +347,14 @@ SRST
-smp 8,sockets=2,cores=2,threads=2,maxcpus=8
The following sub-option defines a CPU topology hierarchy (2 sockets
- totally on the machine, 2 dies per socket, 2 cores per die, 2 threads
- per core) for PC machines which support sockets/dies/cores/threads.
- Some members of the option can be omitted but their values will be
- automatically computed:
+ totally on the machine, 2 dies per socket, 2 modules per die, 2 cores per
+ module, 2 threads per core) for PC machines which support sockets/dies
+ /modules/cores/threads. Some members of the option can be omitted but
+ their values will be automatically computed:
::
- -smp 16,sockets=2,dies=2,cores=2,threads=2,maxcpus=16
+ -smp 32,sockets=2,dies=2,modules=2,cores=2,threads=2,maxcpus=32
The following sub-option defines a CPU topology hierarchy (2 sockets
totally on the machine, 2 clusters per socket, 2 cores per cluster,
--
2.34.1
next prev parent reply other threads:[~2024-04-24 15:37 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-24 15:49 [PATCH v11 00/21] i386: Introduce smp.modules and clean up cache topology Zhao Liu
2024-04-24 15:49 ` [PATCH v11 01/21] hw/core/machine: Introduce the module as a CPU topology level Zhao Liu
2024-04-24 15:49 ` [PATCH v11 02/21] hw/core/machine: Support modules in -smp Zhao Liu
2024-04-24 15:49 ` [PATCH v11 03/21] hw/core: Introduce module-id as the topology subindex Zhao Liu
2024-04-24 15:49 ` [PATCH v11 04/21] hw/core: Support module-id in numa configuration Zhao Liu
2024-04-24 15:49 ` [PATCH v11 05/21] i386/cpu: Fix i/d-cache topology to core level for Intel CPU Zhao Liu
2024-04-24 15:49 ` [PATCH v11 06/21] i386/cpu: Use APIC ID info to encode cache topo in CPUID[4] Zhao Liu
2024-04-24 15:49 ` [PATCH v11 07/21] i386/cpu: Use APIC ID info get NumSharingCache for CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2024-04-24 15:49 ` [PATCH v11 08/21] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid() Zhao Liu
2024-04-24 15:49 ` [PATCH v11 09/21] i386/cpu: Introduce bitmap to cache available CPU topology levels Zhao Liu
2024-04-24 15:49 ` [PATCH v11 10/21] i386: Split topology types of CPUID[0x1F] from the definitions of CPUID[0xB] Zhao Liu
2024-04-24 15:49 ` [PATCH v11 11/21] i386/cpu: Decouple CPUID[0x1F] subleaf with specific topology level Zhao Liu
2024-04-24 15:49 ` [PATCH v11 12/21] i386: Introduce module level cpu topology to CPUX86State Zhao Liu
2024-04-24 15:49 ` [PATCH v11 13/21] i386: Support modules_per_die in X86CPUTopoInfo Zhao Liu
2024-04-24 15:49 ` [PATCH v11 14/21] i386: Expose module level in CPUID[0x1F] Zhao Liu
2024-04-24 15:49 ` [PATCH v11 15/21] i386: Support module_id in X86CPUTopoIDs Zhao Liu
2024-04-24 15:49 ` [PATCH v11 16/21] i386/cpu: Introduce module-id to X86CPU Zhao Liu
2024-04-24 15:49 ` [PATCH v11 17/21] tests: Add test case of APIC ID for module level parsing Zhao Liu
2024-04-24 15:49 ` Zhao Liu [this message]
2024-04-24 15:49 ` [PATCH v11 19/21] i386: Add cache topology info in CPUCacheInfo Zhao Liu
2024-04-24 15:49 ` [PATCH v11 20/21] i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[4] Zhao Liu
2024-04-24 15:49 ` [PATCH v11 21/21] i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2024-04-25 8:06 ` [PATCH v11 00/21] i386: Introduce smp.modules and clean up cache topology Philippe Mathieu-Daudé
2024-04-25 13:30 ` Zhao Liu
2024-05-15 14:48 ` Zhao Liu
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