From: Vineeth Pillai <viremana@linux.microsoft.com>
To: Lan Tianyu <Tianyu.Lan@microsoft.com>,
Michael Kelley <mikelley@microsoft.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
Wei Liu <wei.liu@kernel.org>,
Stephen Hemminger <sthemmin@microsoft.com>,
Haiyang Zhang <haiyangz@microsoft.com>
Cc: Vineeth Pillai <viremana@linux.microsoft.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"K. Y. Srinivasan" <kys@microsoft.com>,
x86@kernel.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org
Subject: [PATCH 2/7] hyperv: SVM enlightened TLB flush support flag
Date: Wed, 7 Apr 2021 14:41:23 +0000 [thread overview]
Message-ID: <2f896dc4e83197f4fe40c08c45e38bbdcc5c0dbe.1617804573.git.viremana@linux.microsoft.com> (raw)
In-Reply-To: <cover.1617804573.git.viremana@linux.microsoft.com>
Bit 22 of HYPERV_CPUID_FEATURES.EDX is specific to SVM and specifies
support for enlightened TLB flush. With this enligtenment enabled,
ASID invalidations flushes only gva->hpa entries. To flush TLB entries
derived from NPT, hypercalls should be used
(HvFlushGuestPhysicalAddressSpace or HvFlushGuestPhysicalAddressList)
Signed-off-by: Vineeth Pillai <viremana@linux.microsoft.com>
---
arch/x86/include/asm/hyperv-tlfs.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hyperv-tlfs.h
index 606f5cc579b2..005bf14d0449 100644
--- a/arch/x86/include/asm/hyperv-tlfs.h
+++ b/arch/x86/include/asm/hyperv-tlfs.h
@@ -133,6 +133,15 @@
#define HV_X64_NESTED_GUEST_MAPPING_FLUSH BIT(18)
#define HV_X64_NESTED_MSR_BITMAP BIT(19)
+/*
+ * This is specific to AMD and specifies that enlightened TLB flush is
+ * supported. If guest opts in to this feature, ASID invalidations only
+ * flushes gva -> hpa mapping entries. To flush the TLB entries derived
+ * from NPT, hypercalls should be used (HvFlushGuestPhysicalAddressSpace
+ * or HvFlushGuestPhysicalAddressList).
+ */
+#define HV_X64_NESTED_ENLIGHTENED_TLB BIT(22)
+
/* HYPERV_CPUID_ISOLATION_CONFIG.EAX bits. */
#define HV_PARAVISOR_PRESENT BIT(0)
--
2.25.1
next prev parent reply other threads:[~2021-04-07 14:41 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-07 14:41 [PATCH 0/7] Hyper-V nested virt enlightenments for SVM Vineeth Pillai
2021-04-07 14:41 ` [PATCH 1/7] hyperv: Detect Nested virtualization support " Vineeth Pillai
2021-04-07 16:09 ` Borislav Petkov
2021-04-07 19:55 ` Michael Kelley
2021-04-07 22:48 ` Sean Christopherson
2021-04-08 13:26 ` Vineeth Pillai
2021-04-08 11:06 ` Vitaly Kuznetsov
2021-04-08 13:15 ` Vineeth Pillai
2021-04-08 15:24 ` Sean Christopherson
2021-04-09 12:23 ` Vineeth Pillai
2021-04-07 14:41 ` Vineeth Pillai [this message]
2021-04-07 19:56 ` [PATCH 2/7] hyperv: SVM enlightened TLB flush support flag Michael Kelley
2021-04-08 13:45 ` Vineeth Pillai
2021-04-07 14:41 ` [PATCH 3/7] KVM: x86: hyper-v: Move the remote TLB flush logic out of vmx Vineeth Pillai
2021-04-08 11:14 ` Vitaly Kuznetsov
2021-04-08 13:18 ` Vineeth Pillai
2021-04-07 14:41 ` [PATCH 4/7] KVM: SVM: hyper-v: Nested enlightenments in VMCB Vineeth Pillai
2021-04-08 15:44 ` Paolo Bonzini
2021-04-09 12:24 ` Vineeth Pillai
2021-04-07 14:41 ` [PATCH 5/7] KVM: SVM: hyper-v: Remote TLB flush for SVM Vineeth Pillai
2021-04-08 11:18 ` Vitaly Kuznetsov
2021-04-08 13:19 ` Vineeth Pillai
2021-04-07 14:41 ` [PATCH 6/7] KVM: SVM: hyper-v: Enlightened MSR-Bitmap support Vineeth Pillai
2021-04-08 11:22 ` Vitaly Kuznetsov
2021-04-08 15:47 ` Paolo Bonzini
2021-04-07 14:41 ` [PATCH 7/7] KVM: SVM: hyper-v: Direct Virtual Flush support Vineeth Pillai
2021-04-08 11:25 ` Vitaly Kuznetsov
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