kvm.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Marc Zyngier <maz@kernel.org>
To: Auger Eric <eric.auger@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Jason Cooper <jason@lakedaemon.net>,
	Robert Richter <rrichter@marvell.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Zenghui Yu <yuzenghui@huawei.com>,
	James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: Re: [PATCH v5 23/23] KVM: arm64: GICv4.1: Expose HW-based SGIs in debugfs
Date: Thu, 19 Mar 2020 15:21:42 +0000	[thread overview]
Message-ID: <45c282bddd43420024633943c1befac3@kernel.org> (raw)
In-Reply-To: <4cb4c3d4-7b02-bb77-cd7a-c185346b6a2f@redhat.com>

Hi Eric,

On 2020-03-19 15:05, Auger Eric wrote:
> Hi Marc,
> 
> On 3/4/20 9:33 PM, Marc Zyngier wrote:
>> The vgic-state debugfs file could do with showing the pending state
>> of the HW-backed SGIs. Plug it into the low-level code.
>> 
>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>> ---
>>  virt/kvm/arm/vgic/vgic-debug.c | 14 +++++++++++++-
>>  1 file changed, 13 insertions(+), 1 deletion(-)
>> 
>> diff --git a/virt/kvm/arm/vgic/vgic-debug.c 
>> b/virt/kvm/arm/vgic/vgic-debug.c
>> index cc12fe9b2df3..b13a9e3f99dd 100644
>> --- a/virt/kvm/arm/vgic/vgic-debug.c
>> +++ b/virt/kvm/arm/vgic/vgic-debug.c
>> @@ -178,6 +178,8 @@ static void print_irq_state(struct seq_file *s, 
>> struct vgic_irq *irq,
>>  			    struct kvm_vcpu *vcpu)
>>  {
>>  	char *type;
>> +	bool pending;
> nit: can be directly initialized to irq->pending_latch
>> +
>>  	if (irq->intid < VGIC_NR_SGIS)
>>  		type = "SGI";
>>  	else if (irq->intid < VGIC_NR_PRIVATE_IRQS)
>> @@ -190,6 +192,16 @@ static void print_irq_state(struct seq_file *s, 
>> struct vgic_irq *irq,
>>  	if (irq->intid ==0 || irq->intid == VGIC_NR_PRIVATE_IRQS)
>>  		print_header(s, irq, vcpu);
>> 
>> +	pending = irq->pending_latch;
>> +	if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
>> +		int err;
>> +
>> +		err = irq_get_irqchip_state(irq->host_irq,
>> +					    IRQCHIP_STATE_PENDING,
>> +					    &pending);
>> +		WARN_ON_ONCE(err);
>> +	}
>> +
>>  	seq_printf(s, "       %s %4d "
>>  		      "    %2d "
>>  		      "%d%d%d%d%d%d%d "
>> @@ -201,7 +213,7 @@ static void print_irq_state(struct seq_file *s, 
>> struct vgic_irq *irq,
>>  		      "\n",
>>  			type, irq->intid,
>>  			(irq->target_vcpu) ? irq->target_vcpu->vcpu_id : -1,
>> -			irq->pending_latch,
>> +			pending,
>>  			irq->line_level,
>>  			irq->active,
>>  			irq->enabled,
>> 
> The patch looks good to me but I am now lost about how we retrieve the
> pending stat of other hw mapped interrupts. Looks we use
> irq->pending_latch always. Is that correct?

Correct. GICv4.0 doesn't give us an architectural way to look at the
vLPI pending state (there isn't even a guarantee about when the GIC
will stop writing to memory, if it ever does).

With GICv4.1, you can introspect the HW state for SGIs. You can also
look at the vLPI state by peeking at the virtual pending table, but
you'd need to unmap the VPE first, which I obviously don't want to do
for this debug interface, specially as it can be used whilst the guest
is up and running.

In the future, we'll have to implement that in order to support guest
save/restore from a GICv4.1 system. I haven't given much thought to it
though.

> For the patch:
> Reviewed-by: Eric Auger <eric.auger@redhat.com>

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2020-03-19 15:21 UTC|newest]

Thread overview: 99+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-04 20:33 [PATCH v5 00/23] irqchip/gic-v4: GICv4.1 architecture support Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 01/23] irqchip/gic-v3: Use SGIs without active state if offered Marc Zyngier
2020-03-12  6:30   ` Zenghui Yu
2020-03-12  9:28     ` Marc Zyngier
2020-03-12 12:05       ` Marc Zyngier
2020-03-13  1:39         ` Zenghui Yu
2020-03-12 17:16   ` Auger Eric
2020-03-12 17:23     ` Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 02/23] irqchip/gic-v4.1: Skip absent CPUs while iterating over redistributors Marc Zyngier
2020-03-16 17:10   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 03/23] irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access Marc Zyngier
2020-03-12  6:56   ` Zenghui Yu
2020-03-04 20:33 ` [PATCH v5 04/23] irqchip/gic-v4.1: Wait for completion of redistributor's INVALL operation Marc Zyngier
2020-03-20 14:23   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 05/23] irqchip/gic-v4.1: Ensure mutual exclusion betwen invalidations on the same RD Marc Zyngier
2020-03-12  7:11   ` Zenghui Yu
2020-03-20 14:23   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 06/23] irqchip/gic-v4.1: Advertise support v4.1 to KVM Marc Zyngier
2020-03-16 17:10   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 07/23] irqchip/gic-v4.1: Map the ITS SGIR register page Marc Zyngier
2020-03-16 17:10   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 08/23] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip Marc Zyngier
2020-03-16 17:10   ` Auger Eric
2020-03-19 10:03     ` Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 09/23] irqchip/gic-v4.1: Add initial SGI configuration Marc Zyngier
2020-03-16 17:53   ` Auger Eric
2020-03-17  2:02     ` Zenghui Yu
2020-03-17  8:36       ` Auger Eric
2020-03-19 10:20     ` Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 10/23] irqchip/gic-v4.1: Plumb mask/unmask SGI callbacks Marc Zyngier
2020-03-16 18:15   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 11/23] irqchip/gic-v4.1: Plumb get/set_irqchip_state " Marc Zyngier
2020-03-12  7:41   ` Zenghui Yu
2020-03-16 21:43   ` Auger Eric
2020-03-19 10:27     ` Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 12/23] irqchip/gic-v4.1: Plumb set_vcpu_affinity " Marc Zyngier
2020-03-17 10:35   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 13/23] irqchip/gic-v4.1: Move doorbell management to the GICv4 abstraction layer Marc Zyngier
2020-03-12  8:20   ` Zenghui Yu
2020-03-04 20:33 ` [PATCH v5 14/23] irqchip/gic-v4.1: Add VSGI allocation/teardown Marc Zyngier
2020-03-12  8:06   ` Zenghui Yu
2020-03-04 20:33 ` [PATCH v5 15/23] irqchip/gic-v4.1: Add VSGI property setup Marc Zyngier
2020-03-12  8:09   ` Zenghui Yu
2020-03-17 10:30   ` Auger Eric
2020-03-19 10:57     ` Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 16/23] irqchip/gic-v4.1: Eagerly vmap vPEs Marc Zyngier
2020-03-12  8:12   ` Zenghui Yu
2020-03-17  2:49   ` Zenghui Yu
2020-03-19 10:55     ` Marc Zyngier
2020-03-20  2:31       ` Zenghui Yu
2020-03-04 20:33 ` [PATCH v5 17/23] KVM: arm64: GICv4.1: Let doorbells be auto-enabled Marc Zyngier
2020-03-12  8:15   ` Zenghui Yu
2020-03-17 11:04   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 18/23] KVM: arm64: GICv4.1: Add direct injection capability to SGI registers Marc Zyngier
2020-03-18  3:28   ` Zenghui Yu
2020-03-20  8:11   ` Auger Eric
2020-03-20 10:05     ` Marc Zyngier
2020-03-20 10:56       ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 19/23] KVM: arm64: GICv4.1: Allow SGIs to switch between HW and SW interrupts Marc Zyngier
2020-03-19 16:16   ` Auger Eric
2020-03-19 19:52     ` Marc Zyngier
2020-03-19 20:13       ` Auger Eric
2020-03-20  9:17         ` Marc Zyngier
2020-03-20  4:22   ` Zenghui Yu
2020-03-04 20:33 ` [PATCH v5 20/23] KVM: arm64: GICv4.1: Plumb SGI implementation selection in the distributor Marc Zyngier
2020-03-18  6:34   ` Zenghui Yu
2020-03-19 12:10     ` Marc Zyngier
2020-03-19 20:38       ` Auger Eric
2020-03-20  3:08         ` Zenghui Yu
2020-03-20  7:59           ` Auger Eric
2020-03-20  9:46             ` Marc Zyngier
2020-03-20 11:09               ` Auger Eric
2020-03-20 11:20                 ` Marc Zyngier
2020-03-20  3:53       ` Zenghui Yu
2020-03-20  9:01         ` Marc Zyngier
2020-03-23  8:11           ` Zenghui Yu
2020-03-23  8:25             ` Marc Zyngier
2020-03-23 12:40               ` Zenghui Yu
2020-03-04 20:33 ` [PATCH v5 21/23] KVM: arm64: GICv4.1: Reload VLPI configuration on distributor enable/disable Marc Zyngier
2020-03-18  3:17   ` Zenghui Yu
2020-03-19 12:18     ` Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 22/23] KVM: arm64: GICv4.1: Allow non-trapping WFI when using HW SGIs Marc Zyngier
2020-03-20  4:23   ` Zenghui Yu
2020-03-20  8:12   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 23/23] KVM: arm64: GICv4.1: Expose HW-based SGIs in debugfs Marc Zyngier
2020-03-18  3:19   ` Zenghui Yu
2020-03-19 15:05   ` Auger Eric
2020-03-19 15:21     ` Marc Zyngier [this message]
2020-03-19 15:43       ` Auger Eric
2020-03-19 16:16         ` Marc Zyngier
2020-03-19 16:17           ` Auger Eric
2020-03-20  4:38       ` Zenghui Yu
2020-03-20  9:09         ` Marc Zyngier
2020-03-20 11:35           ` Zenghui Yu
2020-03-20 11:46             ` Marc Zyngier
2020-03-20 12:09               ` Zenghui Yu
2020-03-05  3:39 ` [PATCH v5 00/23] irqchip/gic-v4: GICv4.1 architecture support Zenghui Yu
2020-03-09  8:17 ` Zenghui Yu
2020-03-09  8:46   ` Marc Zyngier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=45c282bddd43420024633943c1befac3@kernel.org \
    --to=maz@kernel.org \
    --cc=eric.auger@redhat.com \
    --cc=james.morse@arm.com \
    --cc=jason@lakedaemon.net \
    --cc=julien.thierry.kdev@gmail.com \
    --cc=kvm@vger.kernel.org \
    --cc=kvmarm@lists.cs.columbia.edu \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=rrichter@marvell.com \
    --cc=suzuki.poulose@arm.com \
    --cc=tglx@linutronix.de \
    --cc=yuzenghui@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).