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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id t128sm2361371wmf.28.2020.02.19.01.54.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Feb 2020 01:54:15 -0800 (PST) From: Vitaly Kuznetsov To: Paolo Bonzini , qemu-devel@nongnu.org Cc: Eduardo Habkost , Richard Henderson , Marcelo Tosatti , Liran Alon , Roman Kagan , kvm@vger.kernel.org Subject: Re: [PATCH RFC] target/i386: filter out VMX_PIN_BASED_POSTED_INTR when enabling SynIC In-Reply-To: References: <20200218144415.94722-1-vkuznets@redhat.com> <9b4b46c2-e2cf-a3d5-70e4-c8772bf6734f@redhat.com> <87k14j962l.fsf@vitty.brq.redhat.com> Date: Wed, 19 Feb 2020 10:54:14 +0100 Message-ID: <878sky9a2h.fsf@vitty.brq.redhat.com> MIME-Version: 1.0 Content-Type: text/plain Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Paolo Bonzini writes: > On 18/02/20 18:08, Vitaly Kuznetsov wrote: >> Paolo Bonzini writes: >> >>> On 18/02/20 15:44, Vitaly Kuznetsov wrote: >>>> Signed-off-by: Vitaly Kuznetsov >>>> --- >>>> RFC: This is somewhat similar to eVMCS breakage and it is likely possible >>>> to fix this in KVM. I decided to try QEMU first as this is a single >>>> control and unlike eVMCS we don't need to keep a list of things to disable. >>> >>> I think you should disable "virtual-interrupt delivery" instead (which >>> in turn requires "process posted interrupts" to be zero). That is the >>> one that is incompatible with AutoEOI interrupts. >> >> I'm fighting the symptoms, not the cause :-) My understanding is that >> when SynIC is enabled for CPU0 KVM does >> >> kvm_vcpu_update_apicv() >> vmx_refresh_apicv_exec_ctrl() >> pin_controls_set() >> >> for *all* vCPUs (KVM_REQ_APICV_UPDATE). I'm not sure why >> SECONDARY_EXEC_APIC_REGISTER_VIRT/SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY >> are not causing problems and only PIN_BASED_POSTED_INTR does as we clear >> them all (not very important atm). > > Let's take a step back, what is the symptom, i.e. how does it fail? I just do ~/qemu/x86_64-softmmu/qemu-system-x86_64 -machine q35,accel=kvm -cpu host,hv_vpindex,hv_synic -smp 2 -m 16384 -vnc :0 and get qemu-system-x86_64: error: failed to set MSR 0x48d to 0xff00000016 qemu-system-x86_64: /root/qemu/target/i386/kvm.c:2684: kvm_buf_set_msrs: Assertion `ret == cpu->kvm_msr_buf->nmsrs' failed. Aborted (it works with '-smp 1' or without 'hv_synic') > Because thinking more about it, since we have separate VMCS we can set > PIN_BASED_POSTED_INTR and SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY just fine > in the vmcs02. > The important part is to unconditionally call > vmx_deliver_nested_posted_interrupt. > > Something like > > if (kvm_x86_ops->deliver_posted_interrupt(vcpu, vector)) { > kvm_lapic_set_irr(vector, apic); > kvm_make_request(KVM_REQ_EVENT, vcpu); > kvm_vcpu_kick(vcpu); > } > > and in vmx_deliver_posted_interrupt > > r = vmx_deliver_nested_posted_interrupt(vcpu, vector); > if (!r) > return 0; > > if (!vcpu->arch.apicv_active) > return -1; > ... > return 0; Sound like a plan, let me try playing with it. -- Vitaly