From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE999C433EF for ; Thu, 10 Feb 2022 10:31:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239692AbiBJKby (ORCPT ); Thu, 10 Feb 2022 05:31:54 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239693AbiBJKbx (ORCPT ); Thu, 10 Feb 2022 05:31:53 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 85917CEF for ; Thu, 10 Feb 2022 02:31:54 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 1F519B824AA for ; Thu, 10 Feb 2022 10:31:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B70D4C004E1; Thu, 10 Feb 2022 10:31:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1644489111; bh=N2HI8qSihMQX0nVOdnkUOKIzjezs+8DTSwDNJwrZaiA=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=N2GOdPf8N1TAoDJOlHO6xu9cmv8KwBzvfYtPJace0dxvu8vZacBWTO0rNpBOP33GM Fs2Cyct7TjzBaw7lHDw5XiHrxiyPAynMWNLWgiI6hd3ZayZc/9DZIonBwQE/ILfiJc ojW1tN0zF6kwZoRA1XKyYIe/kjOJKDvlN7ubal5IjhwT/vTgl4YgKW59zMgrgMrJjN S3OIFz+2a7yKuzkkahxIbdoSms/bCeRVxbFLdqwbcxHr7IifDpWQ9e7Jdaf2VzTneZ 4QMaD+ni0K1TRzkQ9pKgHGSnuvxRJI/Gs1ETqe3Ko7LdCgYRjnWq+sZeBHJhZmiOwu v5dVEBhIKTfKQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nI6jt-006sGC-EX; Thu, 10 Feb 2022 10:31:49 +0000 Date: Thu, 10 Feb 2022 10:31:48 +0000 Message-ID: <87wni33td7.wl-maz@kernel.org> From: Marc Zyngier To: Reiji Watanabe Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, Linux ARM , James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Will Deacon , Peter Shier , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata Subject: Re: [PATCH v2 1/2] KVM: arm64: mixed-width check should be skipped for uninitialized vCPUs In-Reply-To: References: <20220118041923.3384602-1-reijiw@google.com> <87a6f15skj.wl-maz@kernel.org> <875ypo5jqi.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: reijiw@google.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, pbonzini@redhat.com, will@kernel.org, pshier@google.com, ricarkol@google.com, oupton@google.com, jingzhangos@google.com, rananta@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Thu, 10 Feb 2022 05:31:49 +0000, Reiji Watanabe wrote: > > Hi Marc, > > On Wed, Feb 9, 2022 at 4:04 AM Marc Zyngier wrote: > > > > Hi Reiji, > > > > On Wed, 09 Feb 2022 05:32:36 +0000, > > Reiji Watanabe wrote: > > > > > > Hi Marc, > > > > > > On Tue, Feb 8, 2022 at 6:41 AM Marc Zyngier wrote: > > > > > > > > In [1], I suggested another approach that didn't require extra state, > > > > and moved the existing checks under the kvm lock. What was wrong with > > > > that approach? > > > > > > With that approach, even for a vcpu that has a broken set of features, > > > which leads kvm_reset_vcpu() to fail for the vcpu, the vcpu->arch.features > > > are checked by other vCPUs' vcpu_allowed_register_width() until the > > > vcpu->arch.target is set to -1. > > > Due to this, I would think some or possibly all vCPUs' kvm_reset_vcpu() > > > may or may not fail (e.g. if userspace tries to configure vCPU#0 with > > > 32bit EL1, and vCPU#1 and #2 with 64 bit EL1, KVM_ARM_VCPU_INIT > > > for either vCPU#0, or both vCPU#1 and #2 should fail. But, with that > > > approach, it doesn't always work that way. Instead, KVM_ARM_VCPU_INIT > > > for all vCPUs could fail or KVM_ARM_VCPU_INIT for vCPU#0 and #1 could > > > fail while the one for CPU#2 works). > > > Also, even after the first KVM_RUN for vCPUs are already done, > > > (the first) KVM_ARM_VCPU_INIT for another vCPU could cause the > > > kvm_reset_vcpu() for those vCPUs to fail. > > > > > > I would think those behaviors are odd, and I wanted to avoid them. > > > > OK, fair enough. But then you need to remove most of the uses of > > KVM_ARM_VCPU_EL1_32BIT so that it is only used as a userspace > > interface and > > Yes, I will. > > > maybe not carried as part of the vcpu feature flag anymore. > > At the first call of kvm_reset_vcpu() for the guest, the new kvm > flag is not set yet. So, KVM_ARM_VCPU_EL1_32BIT will be needed > by the function (unless we pass the flag as an argument for the > function or by any other way). Which is why I said 'maybe'. It's not a big deal if the flags stays, but I don't want it evaluated further down the line. It is also pretty similar to HCR_EL2.RW, which we already test with vcpu_el1_is_32bit(). Overall, we need to reduce that state to be as simple as possible. > > > Also, we really should turn all these various bits in the kvm struct > > into a set of flags. I have a patch posted there[1] for this, feel > > free to pick it up. > > Thank you for the suggestion. But, kvm->arch.el1_reg_width is not > a binary because it needs to indicate an uninitialized state. So, it > won't fit perfectly with kvm->arch.flags, which is introduced by [1] > as it is. Of course it's feasible by using 2 bits of the flags though... 2 bits is what I had in mind (one bit to indicate that it has already been initialised, another to carry the actual width). Thanks, M. -- Without deviation from the norm, progress is not possible.