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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id q125sm5312013wme.19.2020.03.03.08.48.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2020 08:48:23 -0800 (PST) From: Vitaly Kuznetsov To: Sean Christopherson Cc: Paolo Bonzini , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Xiaoyao Li Subject: Re: [PATCH v2 00/66] KVM: x86: Introduce KVM cpu caps In-Reply-To: <20200302235709.27467-1-sean.j.christopherson@intel.com> References: <20200302235709.27467-1-sean.j.christopherson@intel.com> Date: Tue, 03 Mar 2020 17:48:23 +0100 Message-ID: <87wo81e65k.fsf@vitty.brq.redhat.com> MIME-Version: 1.0 Content-Type: text/plain Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Sean Christopherson writes: > All AMD patches are build-tested only. I tried this on my AMD EPYC 7401P with QEMU and '-cpu host' and the only difference in CPUIDs I see is: # diff -u cpuid_with cpuid_without --- cpuid_with 2020-03-03 11:38:34.786583429 -0500 +++ cpuid_without 2020-03-03 11:43:58.103484420 -0500 @@ -454,16 +454,16 @@ SvmRev: SVM revision = 0x1 (1) SVM Secure Virtual Machine (0x8000000a/edx): nested paging = true - LBR virtualization = true - SVM lock = true + LBR virtualization = false + SVM lock = false NRIP save = true - MSR based TSC rate control = true - VMCB clean bits support = true - flush by ASID = true - decode assists = true + MSR based TSC rate control = false + VMCB clean bits support = false + flush by ASID = false + decode assists = false SSSE3/SSE5 opcode set disable = false - pause intercept filter = true - pause filter threshold = true + pause intercept filter = false + pause filter threshold = false AVIC: AMD virtual interrupt controller = false virtualized VMLOAD/VMSAVE = false virtualized GIF = false These are all 0x8000000a.EDX and Paolo already highlighted the issue (PATCH66). -- Vitaly