From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B48BC433F5 for ; Thu, 27 Jan 2022 11:50:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236035AbiA0Luq (ORCPT ); Thu, 27 Jan 2022 06:50:46 -0500 Received: from sin.source.kernel.org ([145.40.73.55]:46616 "EHLO sin.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236038AbiA0Lup (ORCPT ); Thu, 27 Jan 2022 06:50:45 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 421DACE2191 for ; Thu, 27 Jan 2022 11:50:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B206AC340E4; Thu, 27 Jan 2022 11:50:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1643284242; bh=EHG35VhiFenk9etoqbqcNVwjMc/WsFfgliwTB9AIFJM=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=aFiHYu8/xdaef46fz7K/wPxY7df2ZCwNlMVypNehpGgBd5fY992ODsXOTdyAis0kj MHG1l2Vp+b9HV3nmL1MD0OkzWny7VTYcTPMJ4GG0vTiYuEspdK+JemRTP5Oh9sUR4z ykP7WGZX0pvOJrlhK3kZjr4vSic/sMv1qTdPKKzpc8yAQvvOO4TTWpad6CA4N/mcrY MV8R67K0ki9ChFaHFHUwFSumaxV9sI8O8StSSLD07pEum67DEaZ5vZS2+LcDxKYNY9 mz7dobWobDjBo0Y0QLzh/yqYLBQ0czWTrh3BgbRGAgBWOhszJwbvdYPie/Bk0GxbJY Gx3iUyu8gXf/A== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nD3IW-003UfZ-KY; Thu, 27 Jan 2022 11:50:40 +0000 Date: Thu, 27 Jan 2022 11:50:40 +0000 Message-ID: <87zgnh5re7.wl-maz@kernel.org> From: Marc Zyngier To: Alexandru Elisei Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, Andre Przywara , Christoffer Dall , Jintack Lim , Haibo Xu , Ganapatrao Kulkarni , James Morse , Suzuki K Poulose , kernel-team@android.com Subject: Re: [PATCH v5 16/69] KVM: arm64: nv: Handle trapped ERET from virtual EL2 In-Reply-To: References: <20211129200150.351436-1-maz@kernel.org> <20211129200150.351436-17-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: alexandru.elisei@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, andre.przywara@arm.com, christoffer.dall@arm.com, jintack@cs.columbia.edu, haibo.xu@linaro.org, gankulkarni@os.amperecomputing.com, james.morse@arm.com, suzuki.poulose@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Tue, 18 Jan 2022 16:36:59 +0000, Alexandru Elisei wrote: > > Hi Marc, > > On Mon, Nov 29, 2021 at 08:00:57PM +0000, Marc Zyngier wrote: > > From: Christoffer Dall > > > > When a guest hypervisor running virtual EL2 in EL1 executes an ERET > > instruction, we will have set HCR_EL2.NV which traps ERET to EL2, so > > that we can emulate the exception return in software. > > > > Signed-off-by: Christoffer Dall > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/include/asm/esr.h | 5 +++++ > > arch/arm64/include/asm/kvm_arm.h | 2 +- > > arch/arm64/kvm/handle_exit.c | 10 ++++++++++ > > 3 files changed, 16 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h > > index d52a0b269ee8..6835e4231119 100644 > > --- a/arch/arm64/include/asm/esr.h > > +++ b/arch/arm64/include/asm/esr.h > > @@ -257,6 +257,11 @@ > > (((e) & ESR_ELx_SYS64_ISS_OP2_MASK) >> \ > > ESR_ELx_SYS64_ISS_OP2_SHIFT)) > > > > +/* ISS field definitions for ERET/ERETAA/ERETAB trapping */ > > + > > +#define ESR_ELx_ERET_ISS_ERET_ERETAx 0x2 > > +#define ESR_ELx_ERET_ISS_ERETA_ERATAB 0x1 > ^^^^^ > Shouldn't that be ERETAA? Hmm, this is rather ambiguous indeed. I'm going to repaint it as: #define ESR_ELx_ERET_ISS_ERET 0x2 #define ESR_ELx_ERET_ISS_ERETA 0x1 which matches the ARM ARM wording as of DDI0487G.b. Thanks, M. -- Without deviation from the norm, progress is not possible.