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Tue, 16 Jul 2019 21:54:01 +0000 Received: from pps.filterd (userp3020.oracle.com [127.0.0.1]) by userp3020.oracle.com (8.16.0.27/8.16.0.27) with SMTP id x6GL8MWT085957; Tue, 16 Jul 2019 21:54:00 GMT Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by userp3020.oracle.com with ESMTP id 2tsmcc25ub-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 16 Jul 2019 21:54:00 +0000 Received: from abhmp0009.oracle.com (abhmp0009.oracle.com [141.146.116.15]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id x6GLrx2R026778; Tue, 16 Jul 2019 21:53:59 GMT Received: from [192.168.14.112] (/109.65.220.198) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 16 Jul 2019 21:53:59 +0000 Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 11.1 \(3445.4.7\)) Subject: Re: [PATCH 1/2] KVM: SVM: Fix workaround for AMD Errata 1096 From: Liran Alon In-Reply-To: <20190716205427.GD28096@linux.intel.com> Date: Wed, 17 Jul 2019 00:53:55 +0300 Cc: "Singh, Brijesh" , Paolo Bonzini , "rkrcmar@redhat.com" , "kvm@vger.kernel.org" , Boris Ostrovsky Content-Transfer-Encoding: quoted-printable Message-Id: <8E46D1A6-12AE-441B-B5EF-566381733106@oracle.com> References: <20190716164151.GC1987@linux.intel.com> <60D01C4B-EC2E-453E-B5F6-BBE8FA94E31D@oracle.com> <015b03bc-8518-2066-c916-f5e12dd2d506@amd.com> <174F27B9-2C6B-4B9F-8091-56FA85B32BB2@oracle.com> <31926848-2cf3-caca-335d-5f3e32a25cd3@amd.com> <17d102bd-74ef-64f8-0237-3a49d64ea344@amd.com> <20190716205427.GD28096@linux.intel.com> To: Sean Christopherson X-Mailer: Apple Mail (2.3445.4.7) X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9320 signatures=668688 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=647 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1907160259 X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9320 signatures=668688 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=691 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1907160259 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org > On 16 Jul 2019, at 23:54, Sean Christopherson = wrote: >=20 > On Tue, Jul 16, 2019 at 08:27:12PM +0000, Singh, Brijesh wrote: >>=20 >> On 7/16/19 3:09 PM, Liran Alon wrote: >>>>=20 >>>> We are discussing reserved NPF so we need to be at CPL3. >>>=20 >>> I don=E2=80=99t see the connection between a reserved #NPF and the = need to be at >>> CPL3. A vCPU can execute at CPL<3 a page that is mapped = user-accessible in >>> guest page-tables in case CR4.SMEP=3D0 and then instruction will = execute >>> successfully and can dereference a page that is mapped in NPT using = an >>> entry with a reserved bit set. Thus, reserved #NPF will be raised = while >>> vCPU is at CPL<3 and DecodeAssist microcode will still raise SMAP = violation >>> as CR4.SMAP=3D1 and microcode perform data-fetch with CPL<3. This = leading >>> exactly to Errata condition as far as I understand. >>>=20 >>=20 >> Yes, vCPU at CPL<3 can raise the SMAP violation. When SMEP is = disabled, >> the guest kernel never should be executing from code in user-mode = pages, >> that'd be insecure. So I am not sure if kernel code can cause this >> errata. >=20 > =46rom KVM's perspective, it's not a question of what is *likely* to = happen > so much as it's a question of what *can* happen. Architecturally = there is > nothing that prevents CPL<3 code from encountering the SMAP fault. Exactly. :) I will submit a v2 patch which also clarifies the details we understood = in this email thread. Thanks, -Liran