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From: "Xu, Like" <like.xu@intel.com>
To: Sean Christopherson <seanjc@google.com>,
	Like Xu <like.xu@linux.intel.com>,
	Andi Kleen <andi@firstfloor.org>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	eranian@google.com, kvm@vger.kernel.org,
	Ingo Molnar <mingo@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	Kan Liang <kan.liang@linux.intel.com>,
	wei.w.wang@intel.com, luwei.kang@intel.com,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 07/17] KVM: x86/pmu: Add IA32_DS_AREA MSR emulation to manage guest DS buffer
Date: Fri, 8 Jan 2021 11:05:11 +0800	[thread overview]
Message-ID: <961e6135-ff6d-86d1-3b7b-a1846ad0e4c4@intel.com> (raw)
In-Reply-To: <X/TXGylLUVLHNIC7@google.com>

Hi Sean,

On 2021/1/6 5:16, Sean Christopherson wrote:
>> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
>> index 6453b8a6834a..ccddda455bec 100644
>> --- a/arch/x86/events/intel/core.c
>> +++ b/arch/x86/events/intel/core.c
>> @@ -3690,6 +3690,7 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr)
>>   {
>>   	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
>>   	struct perf_guest_switch_msr *arr = cpuc->guest_switch_msrs;
>> +	struct debug_store *ds = __this_cpu_read(cpu_hw_events.ds);
>>   
>>   	arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL;
>>   	arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask;
>> @@ -3735,6 +3736,18 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr)
>>   		*nr = 2;
>>   	}
>>   
>> +	if (arr[1].guest) {
>> +		arr[2].msr = MSR_IA32_DS_AREA;
>> +		arr[2].host = (unsigned long)ds;
>> +		/* KVM will update MSR_IA32_DS_AREA with the trapped guest value. */
>> +		arr[2].guest = 0ull;
>> +		*nr = 3;
>> +	} else if (*nr == 2) {
>> +		arr[2].msr = MSR_IA32_DS_AREA;
>> +		arr[2].host = arr[2].guest = 0;
>> +		*nr = 3;
>> +	}
> Similar comments as the previous patch, please figure out a way to properly
> integrate this into the PEBS logic instead of querying arr/nr.

To address your comment, please help confirm whether you are
fine or happy with the streamlined logic of intel_guest_get_msrs():

static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr)
{
     struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
     struct perf_guest_switch_msr *arr = cpuc->guest_switch_msrs;
     struct debug_store *ds = __this_cpu_read(cpu_hw_events.ds);

     arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL;
     arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask;
     arr[0].guest = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_host_mask;

     /*
      * Disable PEBS in the guest if PEBS is used by the host; enabling PEBS
      * in both will lead to unexpected PMIs in the host and/or missed PMIs
      * in the guest.
      */
     if (cpuc->pebs_enabled & ~cpuc->intel_ctrl_host_mask) {
         if (x86_pmu.flags & PMU_FL_PEBS_ALL)
             arr[0].guest &= ~cpuc->pebs_enabled;
         else
             arr[0].guest &= ~(cpuc->pebs_enabled & PEBS_COUNTER_MASK);
     }
     *nr = 1;

     if (x86_pmu.pebs) {
         arr[1].msr = MSR_IA32_PEBS_ENABLE;
         arr[2].msr = MSR_IA32_DS_AREA;
         if (x86_pmu.intel_cap.pebs_baseline)
             arr[3].msr = MSR_PEBS_DATA_CFG;

         /* Skip the MSR loads by stuffing guest=host (KVM will remove the 
entry). */
         arr[1].guest = arr[1].host = cpuc->pebs_enabled & 
~cpuc->intel_ctrl_guest_mask;
         arr[2].guest = arr[2].host = (unsigned long)ds;
         if (x86_pmu.intel_cap.pebs_baseline)
             arr[3].guest = arr[3].host = cpuc->pebs_data_cfg;

         /*
          * Host and guest PEBS are mutually exclusive. Load the guest
          * value iff PEBS is disabled in the host.
          *
          * If PEBS is enabled in the host and the CPU supports PEBS isolation,
          * disabling the counters is sufficient (see commit 9b545c04abd4);
          * Without isolation, PEBS must be explicitly disabled prior to
          * VM-Enter to prevent PEBS writes from overshooting VM-Enter.
          *
          * KVM will update arr[2|3].guest with the trapped guest values
          * iff guest PEBS is allowed to be enabled.
          */
         if (!arr[1].host) {
             arr[1].guest = cpuc->pebs_enabled & ~cpuc->intel_ctrl_host_mask;
             arr[0].guest |= arr[1].guest;
         } else if (x86_pmu.pebs_no_isolation)
             arr[1].guest = 0;

         *nr = x86_pmu.intel_cap.pebs_baseline ? 4 : 3;
     }

     return arr;
}

---
thx,likexu

>
>> +
>>   	return arr;
>>   }


  reply	other threads:[~2021-01-08  3:06 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-04 13:15 [PATCH v3 00/17] KVM: x86/pmu: Add support to enable Guest PEBS via DS Like Xu
2021-01-04 13:15 ` [PATCH v3 01/17] KVM: x86/pmu: Set MSR_IA32_MISC_ENABLE_EMON bit when vPMU is enabled Like Xu
2021-01-04 13:15 ` [PATCH v3 02/17] KVM: x86/pmu: Use IA32_PERF_CAPABILITIES to adjust features visibility Like Xu
2021-01-04 13:15 ` [PATCH v3 03/17] KVM: x86/pmu: Introduce the ctrl_mask value for fixed counter Like Xu
2021-01-13 18:06   ` Peter Zijlstra
2021-01-14  1:58     ` Xu, Like
2021-01-04 13:15 ` [PATCH v3 04/17] perf: x86/ds: Handle guest PEBS overflow PMI and inject it to guest Like Xu
2021-01-13 18:22   ` Peter Zijlstra
2021-01-13 18:27     ` Peter Zijlstra
2021-01-14  3:39     ` Xu, Like
2021-01-15 12:01       ` Peter Zijlstra
2021-01-15 14:30         ` Xu, Like
2021-01-15 14:44           ` Peter Zijlstra
2021-01-15 15:12             ` Xu, Like
2021-01-25  8:26             ` Like Xu
2021-01-25 11:47               ` Peter Zijlstra
2021-02-02  6:31                 ` Xu, Like
2021-01-14 18:55   ` Sean Christopherson
2021-01-15  2:49     ` Xu, Like
2021-01-15 17:42       ` Sean Christopherson
2021-01-22  5:30         ` Like Xu
2021-01-04 13:15 ` [PATCH v3 05/17] KVM: x86/pmu: Reprogram guest PEBS event to emulate guest PEBS counter Like Xu
2021-01-15 11:33   ` Peter Zijlstra
2021-01-15 13:53     ` Xu, Like
2021-01-04 13:15 ` [PATCH v3 06/17] KVM: x86/pmu: Add IA32_PEBS_ENABLE MSR emulation for extended PEBS Like Xu
2021-01-05 21:11   ` Sean Christopherson
2021-01-07 12:38     ` Xu, Like
2021-01-15 14:46   ` Peter Zijlstra
2021-01-15 15:29     ` Xu, Like
2021-01-04 13:15 ` [PATCH v3 07/17] KVM: x86/pmu: Add IA32_DS_AREA MSR emulation to manage guest DS buffer Like Xu
2021-01-05 21:16   ` Sean Christopherson
2021-01-08  3:05     ` Xu, Like [this message]
2021-01-04 13:15 ` [PATCH v3 08/17] KVM: x86/pmu: Add PEBS_DATA_CFG MSR emulation to support adaptive PEBS Like Xu
2021-01-04 13:15 ` [PATCH v3 09/17] KVM: x86: Set PEBS_UNAVAIL in IA32_MISC_ENABLE when PEBS is enabled Like Xu
2021-01-04 13:15 ` [PATCH v3 10/17] KVM: x86/pmu: Expose CPUIDs feature bits PDCM, DS, DTES64 Like Xu
2021-01-04 13:15 ` [PATCH v3 11/17] KVM: x86/pmu: Adjust precise_ip to emulate Ice Lake guest PDIR counter Like Xu
2021-01-04 13:15 ` [PATCH v3 12/17] KVM: x86/pmu: Disable guest PEBS when counters are cross-mapped Like Xu
2021-01-04 13:15 ` [PATCH v3 13/17] KVM: x86/pmu: Add hook to emulate pebs for cross-mapped counters Like Xu
2021-01-04 13:15 ` [PATCH v3 14/17] KVM: vmx/pmu: Limit pebs_interrupt_threshold in the guest DS area Like Xu
2021-01-04 13:15 ` [PATCH v3 15/17] KVM: vmx/pmu: Rewrite applicable_counters field in guest PEBS records Like Xu
2021-01-04 13:15 ` [PATCH v3 16/17] KVM: x86/pmu: Save guest pebs reset values when pebs is configured Like Xu
2021-01-04 13:15 ` [PATCH v3 17/17] KVM: x86/pmu: Adjust guest pebs reset values for crpss-mapped counters Like Xu
2021-01-14 19:10 ` [PATCH v3 00/17] KVM: x86/pmu: Add support to enable Guest PEBS via DS Sean Christopherson
2021-01-15  2:02   ` Xu, Like
2021-01-15 17:57     ` Sean Christopherson
2021-01-15 18:27       ` Andi Kleen
2021-01-15 18:51         ` Sean Christopherson
2021-01-15 19:11           ` Andi Kleen
2021-01-22  9:56           ` Peter Zijlstra
2021-01-25  8:08             ` Like Xu
2021-01-25 11:13               ` Peter Zijlstra
2021-01-25 12:07                 ` Xu, Like
2021-01-25 12:18                   ` Peter Zijlstra
2021-01-25 12:53                     ` Xu, Like

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