From: Reiji Watanabe <reijiw@google.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Linux ARM <linux-arm-kernel@lists.infradead.org>,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
kernel-team@android.com
Subject: Re: [PATCH 1/9] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode
Date: Thu, 27 Oct 2022 07:33:34 -0700 [thread overview]
Message-ID: <CAAeT=FzbYp58Yw6QXqD92w4UMG8x+O81i6hoC+_jeOEL0vFjGA@mail.gmail.com> (raw)
In-Reply-To: <86zgdlms58.wl-maz@kernel.org>
Hi Marc,
> > > +static void kvm_pmu_counter_increment(struct kvm_vcpu *vcpu,
> > > + unsigned long mask, u32 event)
> > > +{
> > > + int i;
> > > +
> > > + if (!kvm_vcpu_has_pmu(vcpu))
> > > + return;
> > > +
> > > + if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E))
> > > + return;
> > > +
> > > + /* Weed out disabled counters */
> > > + mask &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);
> > > +
> > > + for_each_set_bit(i, &mask, ARMV8_PMU_CYCLE_IDX) {
> > > + u64 type, reg;
> > > +
> > > + /* Filter on event type */
> > > + type = __vcpu_sys_reg(vcpu, PMEVTYPER0_EL0 + i);
> > > + type &= kvm_pmu_event_mask(vcpu->kvm);
> > > + if (type != event)
> > > + continue;
> > > +
> > > + /* Increment this counter */
> > > + reg = __vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i) + 1;
> > > + reg = lower_32_bits(reg);
> > > + __vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i) = reg;
> > > +
> > > + if (reg) /* No overflow? move on */
> > > + continue;
> > > +
> > > + /* Mark overflow */
> > > + __vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= BIT(i);
> >
> > Perhaps it might be useful to create another helper that takes
> > care of just one counter (it would essentially do the code above
> > in the loop). The helper could be used (in addition to the above
> > loop) from the code below for the CHAIN event case and from
> > kvm_pmu_perf_overflow(). Then unnecessary execution of
> > for_each_set_bit() could be avoided for these two cases.
>
> I'm not sure it really helps. We would still need to check whether the
> counter is enabled, and we'd need to bring that into the helper
> instead of keeping it outside of the loop.
That's true. It seems that I overlooked that.
Although it appears checking with kvm_vcpu_has_pmu() is unnecessary
(redundant), the check with PMCR_EL0.E is necessary.
Thank you,
Reiji
next prev parent reply other threads:[~2022-10-27 14:33 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-05 13:58 [PATCH 0/9] KVM: arm64: PMU: Fixing chained events, and PMUv3p5 support Marc Zyngier
2022-08-05 13:58 ` [PATCH 1/9] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode Marc Zyngier
2022-08-10 17:21 ` Oliver Upton
2022-08-23 4:30 ` Reiji Watanabe
2022-10-24 10:29 ` Marc Zyngier
2022-10-27 14:33 ` Reiji Watanabe [this message]
2022-10-27 15:21 ` Marc Zyngier
2022-08-05 13:58 ` [PATCH 2/9] KVM: arm64: PMU: Distinguish between 64bit counter and 64bit overflow Marc Zyngier
2022-08-05 13:58 ` [PATCH 3/9] KVM: arm64: PMU: Only narrow counters that are not 64bit wide Marc Zyngier
2022-08-24 4:07 ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 4/9] KVM: arm64: PMU: Add counter_index_to_*reg() helpers Marc Zyngier
2022-08-10 7:17 ` Oliver Upton
2022-08-10 17:23 ` Oliver Upton
2022-08-24 4:27 ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 5/9] KVM: arm64: PMU: Simplify setting a counter to a specific value Marc Zyngier
2022-08-10 15:41 ` Oliver Upton
2022-08-05 13:58 ` [PATCH 6/9] KVM: arm64: PMU: Move the ID_AA64DFR0_EL1.PMUver limit to VM creation Marc Zyngier
2022-08-26 4:34 ` Reiji Watanabe
2022-08-26 6:02 ` Reiji Watanabe
2022-10-26 14:43 ` Marc Zyngier
2022-10-27 16:09 ` Reiji Watanabe
2022-10-27 17:24 ` Marc Zyngier
2022-08-05 13:58 ` [PATCH 7/9] KVM: arm64: PMU: Allow ID_AA64DFR0_EL1.PMUver to be set from userspace Marc Zyngier
2022-08-10 7:08 ` Oliver Upton
2022-08-10 9:27 ` Marc Zyngier
2022-08-26 7:01 ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 8/9] KVM: arm64: PMU: Implement PMUv3p5 long counter support Marc Zyngier
2022-08-10 7:16 ` Oliver Upton
2022-08-10 9:28 ` Marc Zyngier
2022-08-27 7:09 ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 9/9] KVM: arm64: PMU: Allow PMUv3p5 to be exposed to the guest Marc Zyngier
2022-08-10 7:16 ` Oliver Upton
2022-08-10 18:46 ` [PATCH 0/9] KVM: arm64: PMU: Fixing chained events, and PMUv3p5 support Ricardo Koller
2022-08-10 19:33 ` Oliver Upton
2022-08-10 21:55 ` Ricardo Koller
2022-08-11 12:56 ` Marc Zyngier
2022-08-12 22:53 ` Ricardo Koller
2022-10-24 18:05 ` Marc Zyngier
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