From: Jim Mattson <jmattson@google.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>,
kvm list <kvm@vger.kernel.org>,
Eric Hankland <ehankland@google.com>,
Peter Shier <pshier@google.com>,
Krish Sadhukhan <krish.sadhukhan@oracle.com>
Subject: Re: [PATCH] kvm: x86: Add Intel PMU MSRs to msrs_to_save[]
Date: Fri, 27 Sep 2019 10:36:14 -0700 [thread overview]
Message-ID: <CALMp9eSDrXLU2jHXAUYoDqVWnV5gPbT5DUmrhKVbtc6vW+sogA@mail.gmail.com> (raw)
In-Reply-To: <19db28c0-375a-7bc0-7151-db566ae85de6@redhat.com>
On Fri, Sep 27, 2019 at 8:19 AM Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> On 27/09/19 16:40, Vitaly Kuznetsov wrote:
> > Paolo Bonzini <pbonzini@redhat.com> writes:
> >
> >> On 27/09/19 15:53, Vitaly Kuznetsov wrote:
> >>> Paolo Bonzini <pbonzini@redhat.com> writes:
> >>>
> >>>> Queued, thanks.
> >>>
> >>> I'm sorry for late feedback but this commit seems to be causing
> >>> selftests failures for me, e.g.:
> >>>
> >>> # ./x86_64/state_test
> >>> Testing guest mode: PA-bits:ANY, VA-bits:48, 4K pages
> >>> Guest physical address width detected: 46
> >>> ==== Test Assertion Failure ====
> >>> lib/x86_64/processor.c:1089: r == nmsrs
> >>> pid=14431 tid=14431 - Argument list too long
> >>> 1 0x000000000040a55f: vcpu_save_state at processor.c:1088 (discriminator 3)
> >>> 2 0x00000000004010e3: main at state_test.c:171 (discriminator 4)
> >>> 3 0x00007f881eb453d4: ?? ??:0
> >>> 4 0x0000000000401287: _start at ??:?
> >>> Unexpected result from KVM_GET_MSRS, r: 36 (failed at 194)
> >>>
> >>> Is this something known already or should I investigate?
> >>
> >> No, I didn't know about it, it works here.
> >>
> >
> > Ok, this is a bit weird :-) '194' is 'MSR_ARCH_PERFMON_EVENTSEL0 +
> > 14'. In intel_pmu_refresh() nr_arch_gp_counters is set to '8', however,
> > rdmsr_safe() for this MSR passes in kvm_init_msr_list() (but it fails
> > for 0x18e..0x193!) so it stay in the list. get_gp_pmc(), however, checks
> > it against nr_arch_gp_counters and returns a failure.
>
> Huh, 194h apparently is a "FLEX_RATIO" MSR. I agree that PMU MSRs need
> to be checked against CPUID before allowing them.
According to the SDM, volume 4, table 2-2, IA-32 Architectural MSRs,
194H is reserved. Sounds like your CPU is mis-architected. :-)
> Paolo
>
> > Oh, btw, this is Intel(R) Xeon(R) CPU E5-2603 v3
> >
> > So apparently rdmsr_safe() check in kvm_init_msr_list() is not enough,
> > for PMU MSRs we need to do extra.
>
>
>
next prev parent reply other threads:[~2019-09-27 17:36 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-21 18:20 [PATCH] kvm: x86: Add Intel PMU MSRs to msrs_to_save[] Jim Mattson
2019-09-06 16:48 ` Jim Mattson
[not found] ` <8907173e-9f27-6769-09fc-0b82c22d6352@oracle.com>
2019-09-06 20:30 ` Jim Mattson
2019-09-06 20:43 ` Krish Sadhukhan
2019-09-06 21:08 ` Jim Mattson
2019-09-16 20:43 ` Jim Mattson
2019-09-17 12:39 ` Paolo Bonzini
2019-09-27 13:53 ` Vitaly Kuznetsov
2019-09-27 14:00 ` Paolo Bonzini
2019-09-27 14:40 ` Vitaly Kuznetsov
2019-09-27 15:19 ` Paolo Bonzini
2019-09-27 15:26 ` Sean Christopherson
2019-09-27 15:46 ` Vitaly Kuznetsov
2019-09-27 15:55 ` Jim Mattson
2019-09-27 15:59 ` Jim Mattson
2019-09-27 16:01 ` Paolo Bonzini
2019-09-27 15:58 ` Xiaoyao Li
2019-09-27 16:06 ` Paolo Bonzini
2019-09-27 16:10 ` Jim Mattson
2019-09-27 16:32 ` Paolo Bonzini
2019-09-27 17:14 ` Sean Christopherson
2019-09-27 17:19 ` Paolo Bonzini
2019-09-27 17:23 ` Sean Christopherson
2019-09-27 17:30 ` Jim Mattson
2019-09-27 17:35 ` Sean Christopherson
2019-09-27 19:03 ` Jim Mattson
2019-09-27 17:22 ` Jim Mattson
2019-09-27 17:34 ` Sean Christopherson
2019-09-27 17:26 ` Jim Mattson
2019-09-27 16:06 ` Jim Mattson
2019-09-27 17:36 ` Jim Mattson [this message]
2019-09-27 17:45 ` Sean Christopherson
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