From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6780C47096 for ; Fri, 4 Jun 2021 00:34:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BE19B6140F for ; Fri, 4 Jun 2021 00:34:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229826AbhFDAgI (ORCPT ); Thu, 3 Jun 2021 20:36:08 -0400 Received: from mail-ot1-f53.google.com ([209.85.210.53]:43540 "EHLO mail-ot1-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229576AbhFDAgH (ORCPT ); Thu, 3 Jun 2021 20:36:07 -0400 Received: by mail-ot1-f53.google.com with SMTP id i12-20020a05683033ecb02903346fa0f74dso7512167otu.10; Thu, 03 Jun 2021 17:34:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=dM61mylJ53YidPBEu1MqfzVtHPvSltpQP4lAmiQnPxc=; b=Tlltf3pkZ2IWrWaATPbV6DEJsQBCoEP7CfKwGY8DnRl7EyaKdnzUUCArywEnpW6ZKk SeDhT6w1BGJQM3VLqWXInbqM9GIDCeturhx06Z8Zl70YF4aEUJYZp/GM7OzVPcbzb40i 1TYeU4bNsVo5LeG77wcvJItrTPvYtyYTxqMw4V7fUdpTgVjFhnwbY4AlP6t7QUTaA7WO ++lWDevRC1UQIGd2azKxnkG6aopQDCPDflbUIt5YTaCyyjzUffIJtu2s2TTTIqYHtX32 9d/YLBxfaOnvKenpXlo8kIlAhsZQtLrU5fvj60VptVjlTaifxSCecwcQbSfqaK9/Sh3W 3lQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=dM61mylJ53YidPBEu1MqfzVtHPvSltpQP4lAmiQnPxc=; b=HztWZqxw6Pktk0jq68i22uV8Qqu+zKF/pVu3UKIDEEaEsa1YLmorQjiv+4/94HNE6a 72yNnLe+FOyRaLzwjg5R2kAeYtFjRxrZSjlohkiRG5iVVfAP7sjTmfTHsK15Q//ovxY7 Thl8T7KEchfaRXUtx3zY8WiPhJeuVDlVpRR1aLfkRc9VgTuJ8j7nE88LCSFJWUMDAvWT 9WwHZ+smQyic9Lv3bJzdC88ScUPFwVbQNqcv8q+9QXxubkxFVaCHdOfo/S6bxAqA8TE3 1IEjUQZTiJaSM379EfG5JTd2K3kcxr6F1fsdxzmFdeSICW7rPZM69V3Oc5iZGulbosTx 6yUg== X-Gm-Message-State: AOAM531zkKp7hRB/eU+LropOZyM2GVjRGOnZYDX8TB7byqtcB909J1Jm N8fBJWcwXjBmdgMDAzDlvru2LZ1M0QnNIqS+Oew= X-Google-Smtp-Source: ABdhPJzU2K1KK/iATaI/U+jAbe57W3R238nnzo1oIJRV+qlSVzUWqfRJ+XvgotjZUta3gF1uUmqZg5gk4lFVR2W+gFA= X-Received: by 2002:a9d:4b0e:: with SMTP id q14mr1577750otf.254.1622766789119; Thu, 03 Jun 2021 17:33:09 -0700 (PDT) MIME-Version: 1.0 References: <1622710841-76604-1-git-send-email-wanpengli@tencent.com> In-Reply-To: From: Wanpeng Li Date: Fri, 4 Jun 2021 08:32:57 +0800 Message-ID: Subject: Re: [PATCH 1/2] KVM: LAPIC: write 0 to TMICT should also cancel vmx-preemption timer To: David Matlack Cc: LKML , kvm list , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, 4 Jun 2021 at 07:02, David Matlack wrote: > > On Thu, Jun 3, 2021 at 2:04 AM Wanpeng Li wrote: > > > > From: Wanpeng Li > > > > According to the SDM 10.5.4.1: > > > > A write of 0 to the initial-count register effectively stops the local > > APIC timer, in both one-shot and periodic mode. > > If KVM is not correctly emulating this behavior then could you also > add a kvm-unit-test to test for the correct behavior? A simple test here, the test will hang after the patch since it will not receive the spurious interrupt any more. diff --git a/x86/apic.c b/x86/apic.c index a7681fe..947d018 100644 --- a/x86/apic.c +++ b/x86/apic.c @@ -488,6 +488,14 @@ static void test_apic_timer_one_shot(void) */ report((lvtt_counter == 1) && (tsc2 - tsc1 >= interval), "APIC LVT timer one shot"); + + lvtt_counter = 0; + apic_write(APIC_TMICT, interval); + apic_write(APIC_TMICT, 0); + while (!lvtt_counter); + + report((lvtt_counter == 1), + "APIC LVT timer one shot spurious interrupt"); }