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[35.247.111.240]) by smtp.gmail.com with ESMTPSA id h19sm10926752pgm.40.2021.05.17.11.34.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 May 2021 11:34:43 -0700 (PDT) Date: Mon, 17 May 2021 18:34:40 +0000 From: Sean Christopherson To: Jim Mattson Cc: Dave Hansen , Andy Lutomirski , Paolo Bonzini , Jon Kohler , Babu Moger , Thomas Gleixner , Ingo Molnar , the arch/x86 maintainers , "H. Peter Anvin" , Vitaly Kuznetsov , Wanpeng Li , Joerg Roedel , Fenghua Yu , Yu-cheng Yu , Tony Luck , Uros Bizjak , Petteri Aimonen , Kan Liang , Andrew Morton , Mike Rapoport , Benjamin Thiel , Fan Yang , Juergen Gross , Dave Jiang , "Peter Zijlstra (Intel)" , Ricardo Neri , Arvind Sankar , Linux Kernel Mailing List , kvm list Subject: Re: [PATCH] KVM: x86: add hint to skip hidden rdpkru under kvm_load_host_xsave_state Message-ID: References: <20210507164456.1033-1-jon@nutanix.com> <5e01d18b-123c-b91f-c7b4-7ec583dd1ec6@redhat.com> <4e6f7056-6b66-46b9-9eac-922ae1c7b526@www.fastmail.com> <342a8ba9-037e-b841-f9b1-cb62e46c0db8@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Mon, May 17, 2021, Jim Mattson wrote: > On Mon, May 17, 2021 at 11:05 AM Sean Christopherson wrote: > > > > On Mon, May 17, 2021, Dave Hansen wrote: > > > On 5/17/21 10:49 AM, Andy Lutomirski wrote: > > > >> The least awful solution would be to have the NMI handler restore > > > >> the host's PKRU. The NMI handler would need to save/restore the > > > >> register, a la CR2, but the whole thing could be optimized to run > > > >> if and only if the NMI lands in the window where the guest's PKRU > > > >> is loaded. > > > > > > > > Or set a flag causing nmi_uaccess_ok() to return false. > > > > > > Oh, that doesn't sound too bad. The VMENTER/EXIT paths are also > > > essentially a context switch. > > > > I like that idea, too. > > > > The flag might also be useful to fix the issue where the NMI handler activates > > PEBS after KVM disables it. Jim? > > The issue is actually that the NMI handler *clears* IA32_PEBS_ENABLE > bits after giving out the host value of the MSR to KVM. If we were to > block the NMI handler from modifying IA32_PEBS_ENABLE until after the > next VM-exit, that could solve this issue. I don't know if it makes > sense to piggyback on nmi_uaccess(), though. I wasn't thinking about using nmi_uaccess_okay(), but rather whatever flag is added so that can KVM can inform the NMI handler that KVM is in the middle of its version of a context switch. > > > Will widening the window where nmi_uaccess_okay()==false anger any of > > > the perf folks? It looks like perf knows how to handle it nicely.