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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id s20sm10639941pjn.23.2021.07.15.12.02.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jul 2021 12:02:48 -0700 (PDT) Date: Thu, 15 Jul 2021 19:02:44 +0000 From: Sean Christopherson To: Brijesh Singh Cc: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Borislav Petkov , Michael Roth , Vlastimil Babka , tony.luck@intel.com, npmccallum@redhat.com, brijesh.ksingh@gmail.com Subject: Re: [PATCH Part2 RFC v4 08/40] x86/traps: Define RMP violation #PF error code Message-ID: References: <20210707183616.5620-1-brijesh.singh@amd.com> <20210707183616.5620-9-brijesh.singh@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210707183616.5620-9-brijesh.singh@amd.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed, Jul 07, 2021, Brijesh Singh wrote: > Bit 31 in the page fault-error bit will be set when processor encounters > an RMP violation. > > While at it, use the BIT() macro. > > Signed-off-by: Brijesh Singh > --- > arch/x86/include/asm/trap_pf.h | 18 +++++++++++------- > arch/x86/mm/fault.c | 1 + > 2 files changed, 12 insertions(+), 7 deletions(-) > > diff --git a/arch/x86/include/asm/trap_pf.h b/arch/x86/include/asm/trap_pf.h > index 10b1de500ab1..29f678701753 100644 > --- a/arch/x86/include/asm/trap_pf.h > +++ b/arch/x86/include/asm/trap_pf.h > @@ -2,6 +2,8 @@ > #ifndef _ASM_X86_TRAP_PF_H > #define _ASM_X86_TRAP_PF_H > > +#include /* BIT() macro */ What are people's thoughts on using linux/bits.h instead of vdso.bits.h, even though the vDSO version is technically sufficient? Seeing the "vdso" reference definitely made me blink slowly a few times. > + > /* > * Page fault error code bits: > * > @@ -12,15 +14,17 @@ > * bit 4 == 1: fault was an instruction fetch > * bit 5 == 1: protection keys block access > * bit 15 == 1: SGX MMU page-fault > + * bit 31 == 1: fault was an RMP violation > */ > enum x86_pf_error_code { > - X86_PF_PROT = 1 << 0, > - X86_PF_WRITE = 1 << 1, > - X86_PF_USER = 1 << 2, > - X86_PF_RSVD = 1 << 3, > - X86_PF_INSTR = 1 << 4, > - X86_PF_PK = 1 << 5, > - X86_PF_SGX = 1 << 15, > + X86_PF_PROT = BIT(0), > + X86_PF_WRITE = BIT(1), > + X86_PF_USER = BIT(2), > + X86_PF_RSVD = BIT(3), > + X86_PF_INSTR = BIT(4), > + X86_PF_PK = BIT(5), > + X86_PF_SGX = BIT(15), > + X86_PF_RMP = BIT(31), > }; > > #endif /* _ASM_X86_TRAP_PF_H */ > diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c > index 1c548ad00752..2715240c757e 100644 > --- a/arch/x86/mm/fault.c > +++ b/arch/x86/mm/fault.c > @@ -545,6 +545,7 @@ show_fault_oops(struct pt_regs *regs, unsigned long error_code, unsigned long ad > !(error_code & X86_PF_PROT) ? "not-present page" : > (error_code & X86_PF_RSVD) ? "reserved bit violation" : > (error_code & X86_PF_PK) ? "protection keys violation" : > + (error_code & X86_PF_RMP) ? "rmp violation" : > "permissions violation"); > > if (!(error_code & X86_PF_USER) && user_mode(regs)) { > -- > 2.17.1 >