From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02AB0C433F5 for ; Fri, 10 Dec 2021 19:33:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343612AbhLJThM (ORCPT ); Fri, 10 Dec 2021 14:37:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244793AbhLJThM (ORCPT ); Fri, 10 Dec 2021 14:37:12 -0500 Received: from mail.skyhub.de (mail.skyhub.de [IPv6:2a01:4f8:190:11c2::b:1457]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B723C061746; Fri, 10 Dec 2021 11:33:36 -0800 (PST) Received: from zn.tnic (dslb-088-067-202-008.088.067.pools.vodafone-ip.de [88.67.202.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 16F7B1EC0464; Fri, 10 Dec 2021 20:33:31 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1639164811; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=PDcfkacRLkexLsb/qmnDWU30m+hOEfokhx7S78/vSlA=; b=V6Fbdfn+SMfzzvD17gsJpIG2hnpZkwcD3aiQvx2OLmKcxPKmVTe9ZTGYM+sR0BKJMXtQ7s iJCYvzTYSgLp6TkDA7sHEgRPE20Yzj6w3v5ncSP6LPUbYOWAyN6JvPpubMmesblODDSMh7 /N/+Qp+ttJ8o4MD7vhDYF9mECASjQBU= Date: Fri, 10 Dec 2021 20:33:33 +0100 From: Borislav Petkov To: Dave Hansen Cc: Brijesh Singh , x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Michael Roth , Vlastimil Babka , "Kirill A . Shutemov" , Andi Kleen , "Dr . David Alan Gilbert" , tony.luck@intel.com, marcorr@google.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: Re: [PATCH v8 01/40] x86/compressed/64: detect/setup SEV/SME features earlier in boot Message-ID: References: <20211210154332.11526-1-brijesh.singh@amd.com> <20211210154332.11526-2-brijesh.singh@amd.com> <0e09e98c-c013-e9a0-c4b9-279ef41ab0ff@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <0e09e98c-c013-e9a0-c4b9-279ef41ab0ff@intel.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, Dec 10, 2021 at 11:23:24AM -0800, Dave Hansen wrote: > So I think we either need the #ifdef or a stub for sev_enable() > somewhere else. Yeah, there's a stub but in the C header so that won't work for asm files. Forget what I said. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette