From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 851B1C433F5 for ; Thu, 3 Feb 2022 13:59:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350946AbiBCN7s (ORCPT ); Thu, 3 Feb 2022 08:59:48 -0500 Received: from mail.skyhub.de ([5.9.137.197]:32866 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232957AbiBCN7r (ORCPT ); Thu, 3 Feb 2022 08:59:47 -0500 Received: from zn.tnic (dslb-088-067-221-104.088.067.pools.vodafone-ip.de [88.67.221.104]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id EEF591EC04C1; Thu, 3 Feb 2022 14:59:41 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1643896782; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=gHYp8xZFp20UiBgydZl6yyeC9rXQ4/WmPw7B1KUrZ3Y=; b=F3DWJD4vb6hzZvkSuWqaVmu8sCwHciUGt8M/Ok8fVbwRXVyGNDmimooqpo32Z0fQSpgTY8 M8AYV53sTY+yLoY10GWxHj/vztieS9gU69zP+GbdvTfQjgOwKDBGvK7RAOHWnCyhI4rAiv 5t3F3bhvzv/NuW7CdEtLjIX8Mga3NPc= Date: Thu, 3 Feb 2022 14:59:36 +0100 From: Borislav Petkov To: Brijesh Singh Cc: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Michael Roth , Vlastimil Babka , "Kirill A . Shutemov" , Andi Kleen , "Dr . David Alan Gilbert" , brijesh.ksingh@gmail.com, tony.luck@intel.com, marcorr@google.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: Re: [PATCH v9 22/43] x86/sev: Move MSR-based VMGEXITs for CPUID to helper Message-ID: References: <20220128171804.569796-1-brijesh.singh@amd.com> <20220128171804.569796-23-brijesh.singh@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20220128171804.569796-23-brijesh.singh@amd.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, Jan 28, 2022 at 11:17:43AM -0600, Brijesh Singh wrote: > From: Michael Roth > > This code will also be used later for SEV-SNP-validated CPUID code in > some cases, so move it to a common helper. Suggested-by: Sean Christopherson unless he really doesn't want to be the "suggestor" :) > Signed-off-by: Michael Roth > Signed-off-by: Brijesh Singh > --- > arch/x86/kernel/sev-shared.c | 62 +++++++++++++++++++++--------------- > 1 file changed, 36 insertions(+), 26 deletions(-) > > diff --git a/arch/x86/kernel/sev-shared.c b/arch/x86/kernel/sev-shared.c > index 3aaef1a18ffe..633f1f93b6e1 100644 > --- a/arch/x86/kernel/sev-shared.c > +++ b/arch/x86/kernel/sev-shared.c > @@ -194,6 +194,36 @@ enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb, bool set_ghcb_msr, > return verify_exception_info(ghcb, ctxt); > } > > +static int __sev_cpuid_hv(u32 func, int reg_idx, u32 *reg) > +{ > + u64 val; > + > + if (!reg) > + return 0; I don't know what that's supposed to catch? In case callers are interested only in some subset of the CPUID leaf? Meh, I guess... > + sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(func, reg_idx)); > + VMGEXIT(); > + val = sev_es_rd_ghcb_msr(); > + if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) > + return -EIO; > + > + *reg = (val >> 32); > + > + return 0; > +} > + > +static int sev_cpuid_hv(u32 func, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx) > +{ > + int ret; > + > + ret = __sev_cpuid_hv(func, GHCB_CPUID_REQ_EAX, eax); > + ret = ret ? : __sev_cpuid_hv(func, GHCB_CPUID_REQ_EBX, ebx); > + ret = ret ? : __sev_cpuid_hv(func, GHCB_CPUID_REQ_ECX, ecx); > + ret = ret ? : __sev_cpuid_hv(func, GHCB_CPUID_REQ_EDX, edx); You can format that this way: ret = __sev_cpuid_hv(func, GHCB_CPUID_REQ_EAX, eax); ret = ret ? : __sev_cpuid_hv(func, GHCB_CPUID_REQ_EBX, ebx); ret = ret ? : __sev_cpuid_hv(func, GHCB_CPUID_REQ_ECX, ecx); ret = ret ? : __sev_cpuid_hv(func, GHCB_CPUID_REQ_EDX, edx); and then it is visible at a quick glance what this does, due to the regularity. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette