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From: Alexandru Elisei <alexandru.elisei@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	Andre Przywara <andre.przywara@arm.com>,
	Christoffer Dall <christoffer.dall@arm.com>,
	Jintack Lim <jintack@cs.columbia.edu>,
	Haibo Xu <haibo.xu@linaro.org>,
	Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
	Chase Conklin <chase.conklin@arm.com>,
	"Russell King (Oracle)" <linux@armlinux.org.uk>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	karl.heubaum@oracle.com, mihai.carabas@oracle.com,
	miguel.luis@oracle.com, kernel-team@android.com
Subject: Re: [PATCH v6 38/64] KVM: arm64: nv: Unmap/flush shadow stage 2 page tables
Date: Tue, 22 Feb 2022 16:13:14 +0000	[thread overview]
Message-ID: <YhULmh8BraFF5kd/@monolith.localdoman> (raw)
In-Reply-To: <20220128121912.509006-39-maz@kernel.org>

Hi,

On Fri, Jan 28, 2022 at 12:18:46PM +0000, Marc Zyngier wrote:
> From: Christoffer Dall <christoffer.dall@linaro.org>
> 
> Unmap/flush shadow stage 2 page tables for the nested VMs as well as the
> stage 2 page table for the guest hypervisor.
> 
> Note: A bunch of the code in mmu.c relating to MMU notifiers is
> currently dealt with in an extremely abrupt way, for example by clearing
> out an entire shadow stage-2 table. This will be handled in a more
> efficient way using the reverse mapping feature in a later version of
> the patch series.
> 
> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
> Signed-off-by: Jintack Lim <jintack.lim@linaro.org>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
>  arch/arm64/include/asm/kvm_mmu.h    |  3 +++
>  arch/arm64/include/asm/kvm_nested.h |  3 +++
>  arch/arm64/kvm/mmu.c                | 31 +++++++++++++++++++----
>  arch/arm64/kvm/nested.c             | 39 +++++++++++++++++++++++++++++
>  4 files changed, 71 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h
> index 0750d022bbf8..afad4a27a6f2 100644
> --- a/arch/arm64/include/asm/kvm_mmu.h
> +++ b/arch/arm64/include/asm/kvm_mmu.h
> @@ -160,6 +160,8 @@ int create_hyp_io_mappings(phys_addr_t phys_addr, size_t size,
>  			   void __iomem **haddr);
>  int create_hyp_exec_mappings(phys_addr_t phys_addr, size_t size,
>  			     void **haddr);
> +void kvm_stage2_flush_range(struct kvm_s2_mmu *mmu,
> +			    phys_addr_t addr, phys_addr_t end);
>  void free_hyp_pgds(void);
>  
>  void kvm_unmap_stage2_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64 size);
> @@ -168,6 +170,7 @@ int kvm_init_stage2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu);
>  void kvm_free_stage2_pgd(struct kvm_s2_mmu *mmu);
>  int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
>  			  phys_addr_t pa, unsigned long size, bool writable);
> +void kvm_stage2_wp_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, phys_addr_t end);
>  
>  int kvm_handle_guest_abort(struct kvm_vcpu *vcpu);
>  
> diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h
> index f4b846d09d86..8915bead0633 100644
> --- a/arch/arm64/include/asm/kvm_nested.h
> +++ b/arch/arm64/include/asm/kvm_nested.h
> @@ -118,6 +118,9 @@ extern int kvm_walk_nested_s2(struct kvm_vcpu *vcpu, phys_addr_t gipa,
>  extern int kvm_s2_handle_perm_fault(struct kvm_vcpu *vcpu,
>  				    struct kvm_s2_trans *trans);
>  extern int kvm_inject_s2_fault(struct kvm_vcpu *vcpu, u64 esr_el2);
> +extern void kvm_nested_s2_wp(struct kvm *kvm);
> +extern void kvm_nested_s2_clear(struct kvm *kvm);

Why is the function that removes all the entries from kvm->arch.mmu called
unmap_stage2 and the function that removes all the entries from the nested mmus
called s2_clear? Would be nice if the latter also used the verb unmap instead of
clear, to make the code easier to understand.

> +extern void kvm_nested_s2_flush(struct kvm *kvm);
>  int handle_wfx_nested(struct kvm_vcpu *vcpu, bool is_wfe);
>  extern bool __forward_traps(struct kvm_vcpu *vcpu, unsigned int reg,
>  			    u64 control_bit);
> diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
> index 7c56e1522d3c..b9b11be65009 100644
> --- a/arch/arm64/kvm/mmu.c
> +++ b/arch/arm64/kvm/mmu.c
> @@ -190,13 +190,20 @@ void kvm_unmap_stage2_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64 size)
>  	__unmap_stage2_range(mmu, start, size, true);
>  }
>  
> +void kvm_stage2_flush_range(struct kvm_s2_mmu *mmu,
> +			    phys_addr_t addr, phys_addr_t end)
> +{
> +	stage2_apply_range_resched(kvm_s2_mmu_to_kvm(mmu), addr, end, kvm_pgtable_stage2_flush);
> +}
> +
>  static void stage2_flush_memslot(struct kvm *kvm,
>  				 struct kvm_memory_slot *memslot)
>  {
>  	phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
>  	phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
> +	struct kvm_s2_mmu *mmu = &kvm->arch.mmu;
>  
> -	stage2_apply_range_resched(kvm, addr, end, kvm_pgtable_stage2_flush);
> +	kvm_stage2_flush_range(mmu, addr, end);
>  }
>  
>  /**
> @@ -219,6 +226,8 @@ static void stage2_flush_vm(struct kvm *kvm)
>  	kvm_for_each_memslot(memslot, bkt, slots)
>  		stage2_flush_memslot(kvm, memslot);
>  
> +	kvm_nested_s2_flush(kvm);
> +
>  	spin_unlock(&kvm->mmu_lock);
>  	srcu_read_unlock(&kvm->srcu, idx);
>  }
> @@ -742,6 +751,8 @@ void stage2_unmap_vm(struct kvm *kvm)
>  	kvm_for_each_memslot(memslot, bkt, slots)
>  		stage2_unmap_memslot(kvm, memslot);
>  
> +	kvm_nested_s2_clear(kvm);
> +
>  	spin_unlock(&kvm->mmu_lock);
>  	mmap_read_unlock(current->mm);
>  	srcu_read_unlock(&kvm->srcu, idx);
> @@ -814,12 +825,12 @@ int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
>  }
>  
>  /**
> - * stage2_wp_range() - write protect stage2 memory region range
> + * kvm_stage2_wp_range() - write protect stage2 memory region range
>   * @mmu:        The KVM stage-2 MMU pointer
>   * @addr:	Start address of range
>   * @end:	End address of range
>   */
> -static void stage2_wp_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, phys_addr_t end)
> +void kvm_stage2_wp_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, phys_addr_t end)
>  {
>  	struct kvm *kvm = kvm_s2_mmu_to_kvm(mmu);
>  	stage2_apply_range_resched(kvm, addr, end, kvm_pgtable_stage2_wrprotect);
> @@ -851,7 +862,8 @@ static void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
>  	end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
>  
>  	spin_lock(&kvm->mmu_lock);
> -	stage2_wp_range(&kvm->arch.mmu, start, end);
> +	kvm_stage2_wp_range(&kvm->arch.mmu, start, end);
> +	kvm_nested_s2_wp(kvm);
>  	spin_unlock(&kvm->mmu_lock);
>  	kvm_flush_remote_tlbs(kvm);
>  }
> @@ -875,7 +887,7 @@ static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
>  	phys_addr_t start = (base_gfn +  __ffs(mask)) << PAGE_SHIFT;
>  	phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
>  
> -	stage2_wp_range(&kvm->arch.mmu, start, end);
> +	kvm_stage2_wp_range(&kvm->arch.mmu, start, end);
>  }
>  
>  /*
> @@ -890,6 +902,7 @@ void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
>  		gfn_t gfn_offset, unsigned long mask)
>  {
>  	kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
> +	kvm_nested_s2_wp(kvm);
>  }
>  
>  static void kvm_send_hwpoison_signal(unsigned long address, short lsb)
> @@ -1529,6 +1542,7 @@ bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
>  			     (range->end - range->start) << PAGE_SHIFT,
>  			     range->may_block);
>  
> +	kvm_nested_s2_clear(kvm);
>  	return false;
>  }
>  
> @@ -1560,6 +1574,7 @@ bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
>  			       PAGE_SIZE, __pfn_to_phys(pfn),
>  			       KVM_PGTABLE_PROT_R, NULL);
>  
> +	kvm_nested_s2_clear(kvm);
>  	return false;
>  }
>  
> @@ -1578,6 +1593,11 @@ bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
>  					range->start << PAGE_SHIFT);
>  	pte = __pte(kpte);
>  	return pte_valid(pte) && pte_young(pte);
> +
> +	/*
> +	 * TODO: Handle nested_mmu structures here using the reverse mapping in
> +	 * a later version of patch series.
> +	 */

Hm... does this mean that at the moment KVM cannot age a page in a nested MMU?

>  }
>  
>  bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
> @@ -1789,6 +1809,7 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
>  
>  	spin_lock(&kvm->mmu_lock);
>  	kvm_unmap_stage2_range(&kvm->arch.mmu, gpa, size);
> +	kvm_nested_s2_clear(kvm);
>  	spin_unlock(&kvm->mmu_lock);
>  }
>  
> diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
> index a74ffb1d2064..b39af4d87787 100644
> --- a/arch/arm64/kvm/nested.c
> +++ b/arch/arm64/kvm/nested.c
> @@ -505,6 +505,45 @@ int kvm_inject_s2_fault(struct kvm_vcpu *vcpu, u64 esr_el2)
>  	return kvm_inject_nested_sync(vcpu, esr_el2);
>  }
>  
> +/* expects kvm->mmu_lock to be held */

The function could do a lockdep_assert_held(&kvm->mmu_lock), which would serve
the double purpose of documenting that the lock should be held and also
verifying that that is indeed the case when lockdep checking is enabled.

> +void kvm_nested_s2_wp(struct kvm *kvm)
> +{
> +	int i;
> +
> +	for (i = 0; i < kvm->arch.nested_mmus_size; i++) {
> +		struct kvm_s2_mmu *mmu = &kvm->arch.nested_mmus[i];
> +
> +		if (kvm_s2_mmu_valid(mmu))
> +			kvm_stage2_wp_range(mmu, 0, kvm_phys_size(kvm));

I'm not sure about KVM/arm64's plans to add support for dirty ring, but doing
this means that there is a change that duplicate pfns are added to the ring if
the same pfn is present in multiple MMUs.

Thanks,
Alex

> +	}
> +}
> +
> +/* expects kvm->mmu_lock to be held */
> +void kvm_nested_s2_clear(struct kvm *kvm)
> +{
> +	int i;
> +
> +	for (i = 0; i < kvm->arch.nested_mmus_size; i++) {
> +		struct kvm_s2_mmu *mmu = &kvm->arch.nested_mmus[i];
> +
> +		if (kvm_s2_mmu_valid(mmu))
> +			kvm_unmap_stage2_range(mmu, 0, kvm_phys_size(kvm));
> +	}
> +}
> +
> +/* expects kvm->mmu_lock to be held */
> +void kvm_nested_s2_flush(struct kvm *kvm)
> +{
> +	int i;
> +
> +	for (i = 0; i < kvm->arch.nested_mmus_size; i++) {
> +		struct kvm_s2_mmu *mmu = &kvm->arch.nested_mmus[i];
> +
> +		if (kvm_s2_mmu_valid(mmu))
> +			kvm_stage2_flush_range(mmu, 0, kvm_phys_size(kvm));
> +	}
> +}
> +
>  /*
>   * Inject wfx to the virtual EL2 if this is not from the virtual EL2 and
>   * the virtual HCR_EL2.TWX is set. Otherwise, let the host hypervisor
> -- 
> 2.30.2
> 

  reply	other threads:[~2022-02-22 16:13 UTC|newest]

Thread overview: 126+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-28 12:18 [PATCH v6 00/64] KVM: arm64: ARMv8.3/8.4 Nested Virtualization support Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 01/64] arm64: Add ARM64_HAS_NESTED_VIRT cpufeature Marc Zyngier
2022-02-01 14:22   ` Russell King (Oracle)
2022-01-28 12:18 ` [PATCH v6 02/64] KVM: arm64: nv: Introduce nested virtualization VCPU feature Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 03/64] KVM: arm64: nv: Reset VCPU to EL2 registers if VCPU nested virt is set Marc Zyngier
2022-02-02 11:40   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 04/64] KVM: arm64: nv: Allow userspace to set PSR_MODE_EL2x Marc Zyngier
2022-02-02 11:53   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 05/64] KVM: arm64: nv: Add EL2 system registers to vcpu context Marc Zyngier
2022-02-11 16:35   ` Miguel Luis
2022-01-28 12:18 ` [PATCH v6 06/64] KVM: arm64: nv: Add nested virt VCPU primitives for vEL2 VCPU state Marc Zyngier
2022-02-02 12:10   ` Alexandru Elisei
2022-02-14 12:39   ` Miguel Luis
2022-02-14 14:20     ` Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 07/64] KVM: arm64: nv: Handle HCR_EL2.NV system register traps Marc Zyngier
2022-02-01 14:32   ` Russell King (Oracle)
2022-01-28 12:18 ` [PATCH v6 08/64] KVM: arm64: nv: Reset VMPIDR_EL2 and VPIDR_EL2 to sane values Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 09/64] KVM: arm64: nv: Support virtual EL2 exceptions Marc Zyngier
2022-02-02 15:23   ` Alexandru Elisei
2022-02-03 17:43     ` Marc Zyngier
2022-02-04 11:47       ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 10/64] KVM: arm64: nv: Inject HVC exceptions to the virtual EL2 Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 11/64] KVM: arm64: nv: Handle trapped ERET from " Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 12/64] KVM: arm64: nv: Add non-VHE-EL2->EL1 translation helpers Marc Zyngier
2022-02-01 16:37   ` Russell King (Oracle)
2022-02-02 17:08   ` Alexandru Elisei
2022-02-03 18:29     ` Marc Zyngier
2022-02-04 12:05       ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 13/64] KVM: arm64: nv: Handle virtual EL2 registers in vcpu_read/write_sys_reg() Marc Zyngier
2022-02-01 16:40   ` Russell King (Oracle)
2022-01-28 12:18 ` [PATCH v6 14/64] KVM: arm64: nv: Handle SPSR_EL2 specially Marc Zyngier
2022-02-01 16:43   ` Russell King (Oracle)
2022-01-28 12:18 ` [PATCH v6 15/64] KVM: arm64: nv: Handle HCR_EL2.E2H specially Marc Zyngier
2022-02-01 16:51   ` Russell King (Oracle)
2022-02-01 18:17     ` Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 16/64] KVM: arm64: nv: Save/Restore vEL2 sysregs Marc Zyngier
2022-02-03 15:14   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 17/64] KVM: arm64: nv: Emulate PSTATE.M for a guest hypervisor Marc Zyngier
2022-02-01 18:06   ` Russell King (Oracle)
2022-02-03 15:53   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 18/64] KVM: arm64: nv: Trap EL1 VM register accesses in virtual EL2 Marc Zyngier
2022-02-01 18:08   ` Russell King (Oracle)
2022-02-03 17:11   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 19/64] KVM: arm64: nv: Trap SPSR_EL1, ELR_EL1 and VBAR_EL1 from " Marc Zyngier
2022-02-01 18:13   ` Russell King (Oracle)
2022-02-03 17:27   ` Alexandru Elisei
2022-02-04 10:58   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 20/64] KVM: arm64: nv: Trap CPACR_EL1 access in " Marc Zyngier
2022-02-04 11:10   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 21/64] KVM: arm64: nv: Handle PSCI call via smc from the guest Marc Zyngier
2022-02-04 14:02   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 22/64] KVM: arm64: nv: Respect virtual HCR_EL2.TWX setting Marc Zyngier
2022-02-04 15:40   ` Alexandru Elisei
2022-02-04 16:01     ` Alexandru Elisei
2022-02-07 15:38     ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 23/64] KVM: arm64: nv: Respect virtual CPTR_EL2.{TFP,FPEN} settings Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 24/64] KVM: arm64: nv: Respect the virtual HCR_EL2.NV bit setting Marc Zyngier
2022-02-07 15:33   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 25/64] KVM: arm64: nv: Respect virtual HCR_EL2.TVM and TRVM settings Marc Zyngier
2022-02-07 16:18   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 26/64] KVM: arm64: nv: Respect the virtual HCR_EL2.NV1 bit setting Marc Zyngier
2022-02-07 16:36   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 27/64] KVM: arm64: nv: Allow a sysreg to be hidden from userspace only Marc Zyngier
2022-02-08 14:36   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 28/64] KVM: arm64: nv: Emulate EL12 register accesses from the virtual EL2 Marc Zyngier
2022-02-08 15:35   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 29/64] KVM: arm64: nv: Forward debug traps to the nested guest Marc Zyngier
2022-02-09 11:04   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 30/64] KVM: arm64: nv: Configure HCR_EL2 for nested virtualization Marc Zyngier
2022-02-09 16:41   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 31/64] KVM: arm64: nv: Only toggle cache for virtual EL2 when SCTLR_EL2 changes Marc Zyngier
2022-02-09 16:56   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 32/64] KVM: arm64: nv: Filter out unsupported features from ID regs Marc Zyngier
2022-02-09 17:33   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 33/64] KVM: arm64: nv: Hide RAS from nested guests Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 34/64] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures Marc Zyngier
2022-02-16 16:12   ` Alexandru Elisei
2022-02-24 14:25   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 35/64] KVM: arm64: nv: Implement nested Stage-2 page table walk logic Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 36/64] KVM: arm64: nv: Handle shadow stage 2 page faults Marc Zyngier
2022-02-17 15:23   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 37/64] KVM: arm64: nv: Restrict S2 RD/WR permissions to match the guest's Marc Zyngier
2022-02-17 16:29   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 38/64] KVM: arm64: nv: Unmap/flush shadow stage 2 page tables Marc Zyngier
2022-02-22 16:13   ` Alexandru Elisei [this message]
2022-01-28 12:18 ` [PATCH v6 39/64] KVM: arm64: nv: Set a handler for the system instruction traps Marc Zyngier
2022-02-24 11:59   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 40/64] KVM: arm64: nv: Trap and emulate AT instructions from virtual EL2 Marc Zyngier
2022-02-24 15:39   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 41/64] KVM: arm64: nv: Trap and emulate TLBI " Marc Zyngier
2022-02-24 15:56   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 42/64] KVM: arm64: nv: Fold guest's HCR_EL2 configuration into the host's Marc Zyngier
2022-02-25 13:45   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 43/64] KVM: arm64: nv: arch_timer: Support hyp timer emulation Marc Zyngier
2022-03-07 14:52   ` Alexandru Elisei
2022-03-07 15:48     ` Marc Zyngier
2022-03-07 16:28       ` Alexandru Elisei
2022-03-07 16:52         ` Marc Zyngier
2022-03-07 17:13           ` Alexandru Elisei
2022-03-07 15:23   ` Alexandru Elisei
2022-03-07 15:44     ` Marc Zyngier
2022-03-07 16:24       ` Alexandru Elisei
2022-03-07 16:40         ` Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 44/64] KVM: arm64: nv: Add handling of EL2-specific timer registers Marc Zyngier
2022-03-07 16:01   ` Alexandru Elisei
2022-01-28 12:18 ` [PATCH v6 45/64] KVM: arm64: nv: Load timer before the GIC Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 46/64] KVM: arm64: nv: Nested GICv3 Support Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 47/64] KVM: arm64: nv: Don't load the GICv4 context on entering a nested guest Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 48/64] KVM: arm64: nv: vgic: Emulate the HW bit in software Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 49/64] KVM: arm64: nv: vgic: Allow userland to set VGIC maintenance IRQ Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 50/64] KVM: arm64: nv: Implement maintenance interrupt forwarding Marc Zyngier
2022-01-28 12:18 ` [PATCH v6 51/64] KVM: arm64: nv: Add nested GICv3 tracepoints Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 52/64] KVM: arm64: nv: Allow userspace to request KVM_ARM_VCPU_NESTED_VIRT Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 53/64] KVM: arm64: nv: Add handling of ARMv8.4-TTL TLB invalidation Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 54/64] KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like information Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 55/64] KVM: arm64: nv: Tag shadow S2 entries with nested level Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 56/64] KVM: arm64: nv: Add include containing the VNCR_EL2 offsets Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 57/64] KVM: arm64: nv: Map VNCR-capable registers to a separate page Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 58/64] KVM: arm64: nv: Move nested vgic state into the sysreg file Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 59/64] KVM: arm64: Add ARMv8.4 Enhanced Nested Virt cpufeature Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 60/64] KVM: arm64: nv: Sync nested timer state with ARMv8.4 Marc Zyngier
2022-04-01 17:51   ` Chase Conklin
2022-01-28 12:19 ` [PATCH v6 61/64] KVM: arm64: nv: Allocate VNCR page when required Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 62/64] KVM: arm64: nv: Enable ARMv8.4-NV support Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 63/64] KVM: arm64: nv: Fast-track 'InHost' exception returns Marc Zyngier
2022-01-28 12:19 ` [PATCH v6 64/64] KVM: arm64: nv: Fast-track EL1 TLBIs for VHE guests Marc Zyngier

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