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From: Sean Christopherson <seanjc@google.com>
To: Kai Huang <kai.huang@intel.com>
Cc: "pbonzini@redhat.com" <pbonzini@redhat.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"guoke@uniontech.com" <guoke@uniontech.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"haiwenyao@uniontech.com" <haiwenyao@uniontech.com>
Subject: Re: [PATCH 2/5] KVM: SVM: Use kvm_pat_valid() directly instead of kvm_mtrr_valid()
Date: Thu, 4 May 2023 08:34:57 -0700	[thread overview]
Message-ID: <ZFPQodNs0Cn9YDXT@google.com> (raw)
In-Reply-To: <06715227566b520d4a445466f091dc28a0b8cd95.camel@intel.com>

On Wed, May 03, 2023, Kai Huang wrote:
> > for better or worse, KVM doesn't apply the "zap
> > SPTEs" logic to guest PAT changes when the VM has a passthrough device
> > with non-coherent DMA.
> 
> Is it a bug?

No.  KVM's MTRR behavior is using a heuristic to try not to break the VM: if the
VM has non-coherent DMA, then honor UC mapping in the MTRRs as such mappings may
be coverage the non-coherent DMA.

From vmx_get_mt_mask():

	/* We wanted to honor guest CD/MTRR/PAT, but doing so could result in
	 * memory aliases with conflicting memory types and sometimes MCEs.
	 * We have to be careful as to what are honored and when.

The PAT is problematic because it is referenced via the guest PTEs, versus the
MTRRs being tied to the guest physical address, e.g. different virtual mappings
for the same physical address can yield different memtypes via the PAT.  My head
hurts just thinking about how that might interact with shadow paging :-)

Even the MTRRs are somewhat sketchy because they are technically per-CPU, i.e.
two vCPUs could have different memtypes for the same physical address.  But in
practice, sane software/firmware uses consistent MTRRs across all CPUs.

  reply	other threads:[~2023-05-04 15:35 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-03 18:28 [PATCH 0/5] KVM: x86: Clean up MSR PAT handling Sean Christopherson
2023-05-03 18:28 ` [PATCH 1/5] KVM: VMX: Open code writing vCPU's PAT in VMX's MSR handler Sean Christopherson
2023-05-03 23:00   ` Huang, Kai
2023-05-03 23:25     ` Sean Christopherson
2023-05-03 23:41       ` Huang, Kai
2023-05-04 17:23         ` Sean Christopherson
2023-05-03 18:28 ` [PATCH 2/5] KVM: SVM: Use kvm_pat_valid() directly instead of kvm_mtrr_valid() Sean Christopherson
2023-05-03 23:04   ` Huang, Kai
2023-05-04 15:34     ` Sean Christopherson [this message]
2023-05-05 11:20       ` Huang, Kai
2023-05-11 23:03         ` Sean Christopherson
2023-05-03 18:28 ` [PATCH 3/5] KVM: x86: Use MTRR macros to define possible MTRR MSR ranges Sean Christopherson
2023-05-03 23:23   ` Huang, Kai
2023-05-03 23:36     ` Sean Christopherson
2023-05-03 23:49       ` Huang, Kai
2023-05-04  9:02   ` Yan Zhao
2023-05-04 15:36     ` Sean Christopherson
2023-05-03 18:28 ` [PATCH 4/5] KVM: x86: WARN if writes to PAT MSR are handled by common KVM code Sean Christopherson
2023-05-03 23:26   ` Huang, Kai
2023-05-03 23:38     ` Sean Christopherson
2023-05-03 18:28 ` [PATCH 5/5] KVM: x86: Move PAT MSR handling out of mtrr.c Sean Christopherson

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