From: Auger Eric <eric.auger@redhat.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
Suzuki K Poulose <suzuki.poulose@arm.com>,
kernel-team@android.com, James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: Re: [PATCH 6/6] KVM: arm64: Upgrade PMU support to ARMv8.4
Date: Fri, 15 Jan 2021 18:26:32 +0100 [thread overview]
Message-ID: <a0f7a8a7-81fc-282c-5b29-b037a425a8f7@redhat.com> (raw)
In-Reply-To: <28dab4367d6ced5a7d7cbc80ee77f68d@kernel.org>
Hi Marc,
On 1/15/21 5:42 PM, Marc Zyngier wrote:
> Hi Eric,
>
> On 2021-01-15 14:01, Auger Eric wrote:
>> Hi Marc,
>>
>> On 1/14/21 11:56 AM, Marc Zyngier wrote:
>>> Upgrading the PMU code from ARMv8.1 to ARMv8.4 turns out to be
>>> pretty easy. All that is required is support for PMMIR_EL1, which
>>> is read-only, and for which returning 0 is a valid option.
>>>
>>> Let's just do that and adjust what we return to the guest.
>>>
>>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>>> ---
>>> arch/arm64/kvm/sys_regs.c | 5 +++--
>>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>>> index 8f79ec1fffa7..2f4ecbd2abfb 100644
>>> --- a/arch/arm64/kvm/sys_regs.c
>>> +++ b/arch/arm64/kvm/sys_regs.c
>>> @@ -1051,10 +1051,10 @@ static u64 read_id_reg(const struct kvm_vcpu
>>> *vcpu,
>>> /* Limit debug to ARMv8.0 */
>>> val &= ~FEATURE(ID_AA64DFR0_DEBUGVER);
>>> val |= FIELD_PREP(FEATURE(ID_AA64DFR0_DEBUGVER), 6);
>>> - /* Limit guests to PMUv3 for ARMv8.1 */
>>> + /* Limit guests to PMUv3 for ARMv8.4 */
>>> val = cpuid_feature_cap_perfmon_field(val,
>>> ID_AA64DFR0_PMUVER_SHIFT,
>>> - kvm_vcpu_has_pmu(vcpu) ?
>>> ID_AA64DFR0_PMUVER_8_1 : 0);
>>> + kvm_vcpu_has_pmu(vcpu) ?
>>> ID_AA64DFR0_PMUVER_8_4 : 0);
>>> break;
>>> case SYS_ID_DFR0_EL1:
>>> /* Limit guests to PMUv3 for ARMv8.1 */
>> what about the debug version in aarch32 state. Is it on purpose that you
>> leave it as 8_1?
>
> That's a good point. There is also the fact that we keep reporting
> STALL_SLOT as a valid event even in PMCEID0_EL1 despite PMMIR_EL1.SLOTS
> always reporting 0.
Hum OK. I did not notice that ;-)
Thanks
Eric
>
> I'll fix that and resend something next week.
>
> Thanks,
>
> M.
prev parent reply other threads:[~2021-01-15 17:28 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-14 10:56 [PATCH 0/6] KVM: arm64: More PMU/debug ID register fixes Marc Zyngier
2021-01-14 10:56 ` [PATCH 1/6] KVM: arm64: Fix missing RES1 in emulation of DBGBIDR Marc Zyngier
2021-01-15 13:05 ` Auger Eric
2021-01-14 10:56 ` [PATCH 2/6] KVM: arm64: Fix AArch32 PMUv3 capping Marc Zyngier
2021-01-15 13:05 ` Auger Eric
2021-01-14 10:56 ` [PATCH 3/6] KVM: arm64: Add handling of AArch32 PCMEID{2,3} PMUv3 registers Marc Zyngier
2021-01-15 13:04 ` Auger Eric
2021-01-14 10:56 ` [PATCH 4/6] KVM: arm64: Refactor filtering of ID registers Marc Zyngier
2021-01-15 13:31 ` Auger Eric
2021-01-14 10:56 ` [PATCH 5/6] KVM: arm64: Limit the debug architecture to ARMv8.0 Marc Zyngier
2021-01-15 14:01 ` Auger Eric
2021-01-14 10:56 ` [PATCH 6/6] KVM: arm64: Upgrade PMU support to ARMv8.4 Marc Zyngier
2021-01-15 14:01 ` Auger Eric
2021-01-15 16:42 ` Marc Zyngier
2021-01-15 17:26 ` Auger Eric [this message]
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